#-------------------------------------
#This script will create a new project based on
#the filtref files available in the tutorial directory.
#It will also add some project assignments and compile the design.
#
#You can run the script from the Quartus Command Console.
#To view the console, go to View-> Auxiliary Windows -> TCL/TK Console
#To run the script, the command is: source example.tcl
#-------------------------------------


#change to the working directory
cd d:/quartus/ver9906/qdesigns/tutorial

#check to see if the project exists, if so, delete the files
if [project exists filtref] {
	puts "Deleting old project files"
	file delete -force filtref.quartus
	file delete -force filtref.psf
	file delete -force filtref.esf
	file delete -force filtref.csf
	file delete -force filtref.ssf
	file delete -force db
}

#create the project
project create filtref

#open the project
project open filtref

#add source files to current project
project add_assignment "" "" "" "" SOURCE_FILE filtref.bdf
project add_assignment "" "" "" "" SOURCE_FILE acc.v
project add_assignment "" "" "" "" SOURCE_FILE accum.v
project add_assignment "" "" "" "" SOURCE_FILE hvalues.v
project add_assignment "" "" "" "" SOURCE_FILE mult.v
project add_assignment "" "" "" "" SOURCE_FILE state_m.v
project add_assignment "" "" "" "" SOURCE_FILE taps.v

#assign signal clk to be a global signal
project add_assignment filtref "" "" "|clk" GLOBAL_SIGNAL ON

#assign fmax timing requirement for a clock setting
project add_assignment "" "base_clock" "" "" FMAX_REQUIREMENT 55MHZ

#assign clock setting to clk
project add_assignment filtref "" "" "|clk" USE_CLOCK_SETTINGS base_clock

#assign state_m to p-term mode
project add_assignment state_m "" "" "" TECHNOLOGY_MAPPER product_term

#assign the "turbo bit" option for state_m to on
project add_assignment state_m "" "" "" TURBO_BIT ON

#assign Verilog-XL as the simulation tool
project add_assignment "" filtref "" "" EDA_SIMULATION_TOOL VERILOG-XL

#project create_cmp filtref
project set_active_cmp filtref

#assign device family
cmp add_assignment "" "" "" FAMILY APEX20K

#assign a specific device
cmp add_assignment filtref "" "" DEVICE EP20K100TC144-1
cmp add_assignment "" "" "" USE_TIMING_DRIVEN_COMPILATION ON

#start the compilation
cmp start