#------------------------------------------------------- #This script will create a project from a 3rd party EDA #tool output file, set an Fmax requirement and compile #the project for the specified APEX device. This script #is written to be run in the Quartus GUI, using the Run #Script command (Tools menu). Please note that this #script must be in the working directory of the design #to be compiled in order to work. #------------------------------------------------------- #------------------------------------------------------- #Sets all the variables used in the script #------------------------------------------------------- set path "" #------------------------------------------------------- #For example "d:/quartus/designs/design1" #------------------------------------------------------- set filetop "" #------------------------------------------------------- #For example "apex" #------------------------------------------------------- set family "" #------------------------------------------------------- #For example "APEX20K" #------------------------------------------------------- set device "" #------------------------------------------------------- #For example "EP20K400BC652-1" #------------------------------------------------------- set eda_tool "" #------------------------------------------------------- #Design Architect #Design Compiler #FPGA Compiler II #FPGA Express #Leonardo Spectrum #Synplify #ViewDraw #------------------------------------------------------- set fmaxreq "" #------------------------------------------------------- #For example "35" #------------------------------------------------------- #------------------------------------------------------- #The following will create and compile the project based #on the varibles defined above. If a project already #exists with the same name as the top level file, the #script will not work. In order to re-run the script #you will need to un-comment the first part of the script. #------------------------------------------------------- #------------------------------------------------------- #Remove the # signs from this section to allow the script #to run if a project has already been created with the #same name. This portion of the script removes the .quartus #and db directories from the working directory. #------------------------------------------------------- # if [file exists $path/$filetop.quartus] { # puts "Deleting old project files" # file delete -force $path/$filetop.quartus # file delete -force $path/db # } #------------------------------------------------------- #Creates a project with the same name as the top level #file. #------------------------------------------------------- set status [project create $filetop] if {[string match $filetop $status]} { puts "Created project $filetop" } #------------------------------------------------------- #Opens the project in Quartus. #------------------------------------------------------- set status [project open $filetop] if {[string match $filetop $status]} { puts "Opened project $path/$filetop" } #------------------------------------------------------- #Creates a default compilier setting for the project. #------------------------------------------------------- if {[project cmp_exists $filetop] != 1} { project create_cmp $filetop } #------------------------------------------------------- #Sets the compilier setting active. #------------------------------------------------------- set status [project set_active_cmp $filetop] if {[string match "cap" $status]} { puts "Created compiler point $filetop" } #------------------------------------------------------- #Assigns the device family to the project. #------------------------------------------------------- set status [cmp add_assignment "" "" "" FAMILY $family] if {[string match "assignment made" $status]} { puts "Family assignment added" } else { puts " error " } #------------------------------------------------------- #Assigns the device to the project. #------------------------------------------------------- set status [cmp add_assignment $filetop "" "" DEVICE $device] if {[string match "assignment made" $status]} { puts "Device assignment added" } #------------------------------------------------------- #Adds the top level file to the project. #------------------------------------------------------- set status [project add_assignment "" "" "" "" SOURCE_FILE $path/$filetop.edf] if {[string match "project assignment added" $status]} { puts "Source file assignment added" } #------------------------------------------------------- #Sets the EDA tool synthesis setting. #------------------------------------------------------- set status [project add_assignment "" "$filetop" "" "" EDA_DESIGN_ENTRY_SYNTHESIS_TOOL $eda_tool] if {[string match "project assignment added" $status]} { puts "EDA Synthesis tool assignment added" } #------------------------------------------------------- #Assigns a Fmax to the project. #------------------------------------------------------- set status [project add_assignment "" "" "" "" FMAX_REQUIREMENT $fmaxreq\MHZ] if {[string match "project assignment added" $status]} { puts "$fmaxreq requirement added" } #------------------------------------------------------- #Starts the compilation. #------------------------------------------------------- set status [cmp start true] if {$status == 1} { puts "Compilation started" } exit