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APEX 20K Device Family Overview

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With devices ranging from 30,000 to 1.5 million gates (112,000 to 2.5 million system gates) and clock rates up to 840 MHz, Altera's APEX 20K FPGAs offer complete system-level integration on a single device. The innovative APEX MultiCore architecture combines and enhances the strengths of previous FPGA architectures, delivering design integration for system-on-a-programmable-chip (SOPC) applications.

The APEX 20K device family consists of APEX 20K, APEX 20KE, and APEX 20KC devices. To learn more about the differences between the devices, visit the APEX 20K features and APEX 20K architecture web pages.

Altera offers a migration solution from APEX 20KE and APEX 20KC FPGAs to HardCopy® structured ASICs for customers who need a low-risk cost reduction path for high-volume production. Time-sensitive applications can be prototyped and ramped up into production using APEX 20KE and APEX 20KC devices, and when the design is ready for high-volume production, customers can reduce overall costs by migrating the design to HardCopy devices. HardCopy structured ASICs preserve the functionality and timing of the design and improve time-to-market at the lowest cost for high-volume production.

Tables 1, 2, and 3 list the device features of APEX 20KC (1.8 V), APEX 20KE (1.8 V), and APEX 20K (2.5 V) devices.

Table 1. APEX 20KC Device Overview  (1.8 V)
Device EP20K200C EP20K400C EP20K600C EP20K1000C
Typical Gates 200,000 400,000 600,000 1 million
Maximum System Gates 525,824 1,051,648 1,537,024 1,771,520
Logic Elements 8,320 16,640 24,320 38,400
Maximum RAM Bits 106,496 212,992 311,296 327,680
Phase-Locked Loops (PLLs) 2 4 4 4
Speed Grades (1) -7, -8, -9 -7, -8, -9 -7, -8, -9 -7, -8, -9
Maximum User I/O Pins 376 488 588 708
Package
(mm)
Maximum User I/O Pins
208-Pin PQFP
28 x 28 (2)
136      
240-Pin PQFP
32 x 32
168      
356-Pin BGA
35 x 35 (2)
271      
484-Pin FineLine BGA Package
23 x 23
376      
652-Pin BGA
45 x 45
  488 488 488
672-Pin FineLine BGA Package
27 x 27
  488 508 508
1,020-Pin FineLine BGA Package"F33"
33 x 33
    588 708

Notes to Table 1:

  1. For APEX 20KC devices, -7 is the fastest speed grade; for APEX 20K and APEX 20KE devices, -1 is the fastest speed grade.
  2. PQFP = Plastic quad flat pack.
  3. BGA = Ball-grid array.
Table 2. APEX 20KE Device Overview (1.8 V) (part 1 of 2)
Device EP20K30E EP20K60E EP20K100E EP20K160E EP20K200E
Typical Gates 30,000 60,000 100,000 160,000 200,000
Maximum System Gates 122,704 161,792 262,912 404,480 525,824
Logic Elements (LEs) 1,200 2,560 4,160 6,400 8,320
Maximum RAM Bits 24,576 32,768 53,248 81,920 106,496
Phase-Locked Loops (PLLs) 2 2 2 2 2
Speed Grades(1) -3, -2, -1 -3, -2, -1 -3, -2, -1 -3, -2, -1 -3, -2, -1
Maximum User I/O Pins 128 196 246 316 376
Package
(mm)
Maximum User I/O Pins
144-Pin TQFP
20 x 20 (2)
92 92 92 88  
144-Pin FineLine BGA Package
20 x 20
93  93 93    
208-Pin PQFP
28 x 28 (2)
125 148 151 143 136
240-Pin PQFP
32 x 32
    183 175 168
324-Pin FineLine BGA Package
19 x 19
  196 246    
356-Pin BGA
35 x 35 (2)
  196  246 271 271
484-Pin FineLine BGA Package
23 x 23
      316 376
652-Pin BGA
45 x 45
        376
672-Pin FineLine BGA Package
27 x 27
        376


Table 2. APEX 20KE Device Overview (1.8 V) (part 2 of 2)
Device EP20K300E EP20K400E EP20K600E EP20K1000E EP20K1500E
Typical Gates 300,000 400,000 600,000 1 million 1.5 million
Maximum System Gates 728,064 1,051,648 1,537,024 1,771,520 2,391,184
Logic Elements (LEs) 11,520 16,640 24,320 38,400 51,840
Maximum RAM Bits 147,456 212,992 311,296 327,680 442,368
Phase-Locked Loops (PLLs) 4 4 4 4 4
Speed Grades (1) -3, -2, -1 -3, -2, -1 -3, -2, -1 -3, -2, -1 -3, -2, -1
Maximum User I/O Pins 408 488 588 708 808
Package
(mm)
Maximum User I/O Pins
240-Pin PQFP
32 x 32
152        
652-Pin BGA
45 x 45
408 488 488 488 488
672-Pin FineLine BGA Package
27 x 27
408 488 508 508  
1,020-Pin FineLine BGA Package "F33"
33 x 33
    588 708 808

Notes to Table 2:

  1. TQFP = Thin quad flat pack.
  2. For APEX 20KC devices, -7 is the fastest speed grade; for APEX 20K and APEX 20KE devices, -1 is the fastest speed grade.
Table 3. APEX 20K Device Overview  (2.5 V)
Device EP20K100 EP20K200 EP20K400
Maximum System Gates 263,000 526,000 1,052,000
Logic Elements (LEs) 4,160 8,320 16,640
Maximum RAM bits 53,248 106,496 212,992
Phase-Locked Loops (PLLs) 1 1 1
Speed Grade (1) -3, -2, -1 -3, -2, -1 -3, -2, -1
Maximum User I/O Pins 252 382 502
Package
(mm)
Maximum User I/O Pins
144-Pin TQFP
20 x 20
101    
208-Pin PQFP
28 x 28
159    
240-Pin PQFP
28 x 28
189    
208-Pin RQFP
28 x 28
  144  
240-Pin RQFP
28 x 28
  174  
324-Pin FineLine BGA Package
19 x 19
252    
356-Pin BGA
35 x 35
252 277  
484-Pin FineLine BGA Package
23 x 23
  382  
652-Pin BGA
45 x 45
    502
672-Pin FineLine BGA Package
27 x 27
    502

Notes to Table 3:

  1. For APEX 20KC devices, -7 is the fastest speed grade; for APEX 20K and APEX 20KE devices, -1 is the fastest speed grade.
  2. TQFP: thin quad flat pack, PQFP: plastic quad flat pack, RQFP: power quad flat pack, BGA: ball-grid array

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