Literature Licensing Buy On-Line Download Entire Site Part Number Knowledge DB

Home   |   Products   |   Support   |   End Markets   |   Technology Center   |   Education & Events   |   Corporate   |   Buy On-Line

Devices   |   Design Software   |   Intellectual Property   |   Design Services   |   Dev. Kits/Cables   |   Literature

CPLDs    MAX II        Overview        Applications        Design Resources           Literature           Getting Started    MAX 3000A    MAX 7000     FPGAs    Cyclone III    Cyclone II    Cyclone    Stratix III    Stratix II    Stratix    Stratix II GX    Stratix GX    Arria GX     HardCopy ASICs       About HardCopy Series    HardCopy III    HardCopy II    HardCopy Stratix     Device-Specific Offerings    Lead-Free       Extended Temperature       Industrial Temperature       Military Temperature       Automotive Temperature     Configuration Devices    Enhanced Configuration    Serial Configuration     Mature Products       Product Listing

Home > Products > Devices > MAX II Print This Page Subscribe to Email MAX II CPLD Family: The Lowest-Power, Lowest-Cost CPLDs Ever Low Power CPLD Family Architecture Portable Applications MAX IIZ CPLDs Altera's MAX® II family of CPLDs are the lowest power, lowest cost CPLDs ever. MAX II CPLDs are based on a groundbreaking architecture that delivers the lowest power and the lowest cost per I/O pin of any CPLD family. With the recent introduction of the MAX IIZ products, there are now three variants that all use the same innovative CPLD architecture: MAX II CPLD MAX IIG CPLD MAX IIZ CPLD This instant-on, non-volatile device family targets general-purpose, low-density logic applications, such as cellular handset design. In addition to delivering the lowest cost for traditional CPLD designs, MAX II CPLDs drive power and cost improvements to higher densities, enabling you to use MAX II CPLDs in place of higher power or higher cost ASSPs and standard-logic CPLDs. MAX II Device Family Advanced Features MAX II CPLDs enable a high level of functional integration to reduce system design costs. This section describes the advanced features found in MAX II CPLDs. Low Power One-tenth the power consumption (compared to previous-generation 3.3-V MAX devices) 1.8-V core voltage for reduced power consumption and increased reliability CPLD industry's lowest standby specification, allowing longer use in battery powered applications Auto start/stop capability for turning off the CPLD when not in use Cost-Optimized Architecture Four times the density at half the price (compared to previous-generation MAX devices) Designed for minimum die size, giving the lowest cost per I/O pin in the industry High Performance Support for internal clock frequency rates of up to 300 MHz Twice the performance (compared to 3.3-V MAX devices) Unique Features On-board oscillator and user flash memory Reduces chip count by eliminating discrete oscillators or non-volatile storage devices Real-Time In-System Programmability (ISP) Capable of downloading a second design while the device is operational Reduces the cost of remote field updates MultiVolt Core Flexibility On-chip voltage regulator accepts 3.3-V, 2.5-V, or 1.8-V supply Simplifies board design with fewer power rails Parallel Flash Loader Megafunction Improves configuration efficiency of non-JTAG-compliant flash devices on the board Simplifies board management by allowing JTAG command implementation via the MAX II device I/O Capabilities MultiVolt I/O capability allows interface with devices at 1.5-V, 1.8-V, 2.5-V, or 3.3-V logic levels Schmitt triggers, programmable slew rate, and programmable drive strength improve signal integrity Easiest-to-Use Software Altera’s no-cost Quartus® II Web Edition software supports all MAX II CPLDs and optimizes pin-locked fitting and performance New MAX+PLUS® II look-and-feel option in the Quartus II software enhances ease of use MAX II CPLD Applications MAX II devices target common control path applications, including: Power-up sequencing System configuration I/O expansion Interface bridging Related Links MAX II Backgrounder (PDF) Questions and Answers Altera Takes Radical New Direction With MAX II CPLDs MAX II Device Handbook MAX II Customer Quotes   Rate This Page   Next Steps View Webcast Download Software Get Design Example Get Reference Design View Video Buy Now Purchase Dev Kits Purchase Devices Support Get Device Support Knowledge Database Use Troubleshooter Join the Altera Forum Documentation Get Literature Get Handbook Get Data Sheet Get Email Updates Get Product Catalog

Please Give Us Feedback

Home | Products | Support | End Markets | Technology Center | Education & Events | Corporate | Buy On-Line  Devices | Design Software | Intellectual Property | Design Services | Dev. Kits/Cables | Literature  Contact Us | Site Help | Site Map | Privacy | Legal Notice  Copyright © 1995-2008 Altera Corporation, 101 Innovation Drive, San Jose, California 95134, USA Altera, Stratix, Arria, Cyclone, MAX, HardCopy, Nios, Quartus and MegaCore are trademarks of Altera Corporation