Low-Power MAX II CPLDs
Since its introduction, Altera’s MAX® II CPLD family has shown a strong commitment to low power applications. Continuing this commitment is the new zero-power MAX IIZ, which combines the industry’s lowest dynamic power consumption, with the industry’s lowest standby power consumption. With the introduction of the zero-power MAX IIZ CPLD, Altera delivers the lowest static and dynamic power in the CPLD industry. Altera® CPLDs enable you to maximize functionality, while minimizing power consumption.
Low power applications are proliferating as demand increases for small, inexpensive products that support high levels of functionality with extended battery life. Table 1 shows some end markets with a need for low power.
| Table 1. End Markets Requiring Low Power |
| Markets |
Applications |
| Consumer |
- Educational toys
- Portable media players
- Smart phones
|
| Industrial |
- POS scanners
- Industrial PDAs
- Camera modules
|
| Medical |
|
| Test and Measurement |
- Multimeters
- Portable diagnostics
|
| Wireless and Wireline |
- PCMCIA cards
- Optical modules
- Cellular handsets
|
| Automotive |
- Mobile GPS
- Mobile infotainment systems
|
MAX IIZ Low-Power CPLD
The MAX IIZ low-power CPLD offers a power-down capability to further conserve battery life. Designed from the ground up to deliver low power, MAX IIZ CPLDs have many power saving system characteristics, including hot-socketing capability, power-sequence flexibility, and single power supply simplicity.
Standby (Static) Power Consumption
Table 2 shows the standby current consumption for the MAX IIZ CPLD family. As shown, MAX IIZ CPLDs provide ultra-low standby power consumption, making them ideal for portable applications design where battery life must be maximized.
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Table 2. MAX IIZ CPLD DC Characteristics
|
|
Device
|
VCCINT Standby Current
|
VCCIO Standby Current
|
|
Typical (1)
|
Maximum (2)
|
Typical (1)
|
Maximum (2)
|
|
EPM240Z
|
29 µA
|
150 µA
|
2 µA
|
10 µA
|
|
EPM570Z
|
32 µA
|
210 µA
|
4 µA
|
10 µA
|
Notes:
- At 25°C, VCCINT = VCCIO = VIPIN = 1.8 V
- At 70°C, VCCINT = VCCIO = VIPIN = 1.8 V
Dynamic Power Consumption
Unlike traditional macrocell-based CPLD architectures, MAX IIZ low-power CPLDs do not use sense amps that require bias currents to amplify signal voltages within the device. Additionally, with Quartus® II software, efficient implementation of most interconnects with local routing in MAX IIZ CPLDs significantly lowers dynamic power. Figure 1 graphs the typical power consumption (mWatts) versus frequency for the MAX IIZ EPM240Z CPLDs. Similar graphs for all MAX II CPLD family members can be found in the Understanding & Evaluating Power in MAX II Devices (PDF) chapter of the MAX II Device Handbook.
Figure 1. Power Consumption Versus Frequency for MAX II EPM240Z CPLDs (1), (2)
Notes:
- The typical operating conditions are at 25°C.
- Each device is fully utilized with 16-bit counters.
MAX IIZ CPLD Versus CoolRunner-II Power Consumption
Figure 2 shows the dynamic power consumption of the MAX IIZ CPLD compared to a CoolRunner-II traditional macrocell-based CPLD. As shown, the MAX IIZ CPLD provides significantly lower power consumption at every performance level.
Figure 2. MAX IIZ CPLD Versus CoolRunner-II, Dynamic Power Consumption
Automatic Power-Down Capability
To achieve the absolute lowest power, it is ideal if a device consumed no power when it was not being used. This is achievable in MAX IIZ CPLDs because, unlike traditional macrocell-based CPLDs, MAX IIZ CPLDs contain an internal oscillator, which can be used to build an automatic power-down capability.
MAX IIZ automatic power-down operation is simple (Figure 3). All of the inputs to the MAX IIZ CPLD control a counter. If any input is active, the counter is held in reset. When all of the inputs go inactive, the counter counts for a user-defined length of time. If during this time all of the inputs remain inactive, a signal is sent to disable a MOSFET, which shuts off power to the MAX IIZ CPLD. When any input goes active again, the internal counter is reset, power is enabled, and the MAX IIZ CPLD powers up. For more information on the power-down capability in MAX IIZ CPLDs, refer to the MAX II Power-Down Design Example page.
Figure 3. MAX IIZ CPLD Automatic Power-Down Capability
Figure 4 shows the power consumption of the MAX IIZ CPLD, compared to a CoolRunner-II traditional macrocell-based CPLD, when both devices are powered off. This application example assumes 50 percent of inputs are at VCC and 50 percent of inputs are at GND when the CPLD's VCCINT and VCCIO are powered down. As shown, the leakage current through the I/O pins on the CoolRunner-II device results in significantly more power dissipation when the device is powered off compared to the MAX IIZ device. This is because, unlike traditional macrocell-based CPLDs, multiple I/O pins at VCC or GND have little effect on the MAX IIZ CPLD's power dissipation when powered off.
Figure 4. MAX IIZ CPLD Versus CoolRunner-II When Power Is Off
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