Figure 1. Worst-Case Total Power Comparison
Continuing its market leadership in the low-cost FPGA space, Cyclone II devices are the industry’s lowest-cost, lowest-power 90-nm FPGAs available today -consuming as little as 12 mW of static power. Built from the ground up for low cost and optimized for low power consumption, Cyclone II devices consume half the power of competing 90-nm low-cost FPGAs.
Compared to competing 90-nm low-cost FPGAs, Cyclone II devices offer:
- 1/2 the static power
- 1/2 the dynamic power
- Zero in-rush current
- Hot-socketing support
- Fewer required power supplies
To learn how Cyclone II FPGAs compare with competing FPGAs, please visit the Cyclone II Power Comparison.
Altera® has the most accurate and complete power management design tools. Unlike other competing vendors that offer only typical silicon power estimates for their low-cost families, Altera additionally offers 85° C and worst-case silicon power estimates throughout its tool suite, essential for reliable designs. Altera offers the following resources to give engineers the most accurate and reliable information on power:
- Cyclone II PowerPlay Power Estimator
- Quartus II PowerPlay Power Analysis & Optimization Technology
- Power Management Resource Center
Altera Techniques for Lowering Power Consumption in Silicon
There are many techniques that can be employed when reducing power in silicon. Table 1 describes some techniques used in Cyclone II FPGAs.
| Table 1. Silicon Design & Process Techniques for Reducing Power Consumption at 90 nm | ||
| Technique | Power Benefit | Specific Effects |
|---|---|---|
| Decrease Core Voltage | Total Power Reduced |
|
| Increase Vt (Threshold Voltage) | Static Power Reduced |
|
| Increase Transistor Length |
Static Power Reduced |
|
| Process Changes: FSG to Low-K Dielectric |
Dynamic Power Reduced |
|
| Lower I/O Pin Capacitance | Dynamic Power Reduced (I/O) |
|
| Power Efficient Clocking Structure | Dynamic Power Reduced |
|
Manufacturers must intelligently employ the techniques described in Table 1 to optimize performance while minimizing power consumption in silicon. Altera took these steps to help keep silicon power consumption as low as possible without compromising customer performance requirements or manufacturability. Altera FPGAs generate less heat and consume less system power.
