Cyclone III FPGAs in Military Applications
Altera understands the unique challenges facing military electronic systems designers. Cyclone® III FPGAs offer an unprecedented combination of low power, functionality, and low cost to meet stringent size, weight, and power (SWaP) requirements to enable next-generation military applications. Also available are a rich set of software, intellectual property (IP), reference designs, and development kits to accelerate product development and lower risk.
Challenges
Military designs often operate in thermally challenging and space constrained environments with stringent SWaP requirements. Product lifecycles can be anywhere from a few years to decades. Often prototype and design cycles span several years and systems need to be flexible to support emerging/changing standards such as new software defined radio waveforms. Single event upset (SEU) mitigation is a concern when designing high reliability systems. Some designs are forced into lead free packaging even though leaded packages are still the preferred choice for military system manufacturing flows.
Solution
Cyclone III FPGAs offer an unprecedented combination of low power, functionality, and low cost to meet stringent SWaP requirements to enable next-generation military applications (refer to Table 1).
| Table 1. Key Military System Application Advantages of Cyclone III FPGAs |
| Feature |
Advantage |
| Low Power |
The EP3C120 device includes 119K logic elements LEs, nearly 4-Mbits of memory, and 288 multipliers while consuming just 179 mW typical static power at a junction temperature of 85°C. |
| Abundant Memory at Every Density |
Up to 4 Mbits of embedded memory and an increased memory-to-logic ratio for all Cyclone III device family members. |
| Digital Signal Processing (DSP) Multipliers |
Up to 288 embedded 18-bit x 18-bit multipliers at up to 260-MHz performance to process DSP-intensive algorithms. |
| Nios® II Embedded Soft Processor |
The world’s most versatile embedded soft processor, ideal for implementing a low-cost microcontroller. |
| Small Form Factor Support |
.8 mm spacing uBGA packages, bare die support, and custom multi-chip module support. All devices are offered in leaded and lead-free packages. |
| Industrial Temperature Support |
Support for harsh operating environments from -40°C to 85°C. |
| SEU Mitigation |
Dedicated cyclic redundancy check (CRC) circuitry ensures data integrity and is one of the best techniques for mitigating SEU problems. |
| End of Life Protection |
Altera keeps its devices in production longer, reducing obsolescence risk management volume. |
Typical Software Defined Radio Implementation
Figure 1 shows a typical software defined radio (SDR) implementation. In this example, the major DSP portion of the design can be implemented in the Cyclone III EP3C120 device with enough head room to support currently available waveforms as well as next generation waveforms. A critical criteria is to meet performance needs while keeping size, weight, and power consumption to a minimum to extend battery life and reduce the size and weight of handheld equipment. With up to 119K LEs and 4 Mbits of memory, only Cyclone III devices provide enough system integration capabilities while keeping static power consumption under 0.5 W at 85°C junction temperature.
Figure 1. Typical Software Defined Radio Block Diagram
Resources
Get to market faster, stay within power budgets, and increase your productivity over traditional design solutions with Cyclone III FPGAs. Table 2 provides links to just some of the resources available for designing military applications.
| Table 2. Design Resources |
| Category |
Resource |
Description |
| Development Kit Resources |
 |
Cyclone III Development Kits
|
Altera and partners offer a portfolio of development kits starting at just $199 to jump-start Cyclone III designs. Each kit comes with everything you need to evaluate and design with Cyclone III FPGAs.
You can order many of these kits via Altera's online eStore or any Altera® distribution partner.
|
| Software and Intellectual Property Resources |
 |
Reference Designs
|
Reference designs from Altera and partners for common wireless communications systems components such as scalable OFDMA reference design, digital down conversion (DDC) and digital up conversion (DUC), and bridges to DSP processors. |
|
DSP Functions
|
Library of intellectual property (IP) cores from Altera and partners for the following DSP functional areas: filtering, modulation, demodulation, transforms encryption, decryption, correlation, error detection, error correction, signal generation, synchronization, and video and image processing. |
|
Nios II Embedded Processor
|
The world's most versatile processor supported by easy-to-use development tools and a portfolio of FPGA development kits. |
| Video-on-Demand Resources |
 |
Addressing SWaP Constraints in Military and Aerospace Applications
|
Learn how you can use the newest 65-nm FPGAs to reduce size, weight, and power in SWaP-constrained applications to take new platforms to the battlefield and air. |
| White Papers |
 |
Designing With Confidence for Military SDR Production Applications (PDF)
|
Describes how FPGAs can enable new SDR systems with smaller footprints, lighter weight, and smaller batteries. |
|
Architecture and Component Selection for SDR Applications (PDF)
|
Describes the objectives and trade-offs used to select components for battery powered SDRs to meet SWaP requirements. |
Related Links
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