Cyclone III FPGA: Embedded Memory
For memory intensive applications, on-chip memory on Cyclone® III FPGAs has been increased by up to 3.5 times compared to previous low-cost FPGA generations. With up to 4 Mbits of embedded memory and an increased memory-to-logic ratio, you can now design next generation products and stay within rigorous cost constraints.
Figure 1. Cyclone III Overview Chart
The embedded memory structure consists of 9,216-bit (including parity bits) blocks. The M9K memory blocks allow you optimal usage for memory intensive applications such as packet buffers and processor code storage as well as digital signal processing (DSP) intensive applications such as video line buffers and video and image processing as well as general purpose memory.
Figure 2. M9K Block
Each M9K block can be used in different widths and configurations including FIFO, packed mode and true dual-port mode. In addition, the clock read and write enables increase the flexibility of use and allows for reduced power consumption. Cyclone III FPGAs provide the optimal solution for memory applications.
For further details on Cyclone III embedded memory please refer to the Cyclone III Device Handbook.
|
Literature
> 
Next Steps