Altera Device Part Number Format

Select an Altera^® device name to see its associated part number format (described in Tables 1, through 4).

ACEX^® 1K
APEX™ 20K
APEX 20KC
APEX 20KE
APEX II
Arria^® GX
Arria II GX
Classic™
Configuration
Cyclone^®
Cyclone II
Cyclone III
Cyclone IV
Excalibur™
FLEX^®

HardCopy^® II
HardCopy III
HardCopy IV (E and GX)
MAX^®
MAX II
MAX IIG
MAX IIZ
Mercury™
Stratix^®
Stratix II
Stratix III (E and L)
Stratix IV (E, GX, GT)
Stratix V (GX, GS, GT, E)
Stratix GX
Stratix II GX

Part Number Prefix	Device Family
*Table 1. Altera Part Number Prefixes*
EP1K	ACEX
EP20K (see Table 2 for EP20KxxxC1) (1)	APEX 20K
EPC	Configuration
EPF	FLEX
EPM	MAX
EPxxx (1)	Classic

Part Number Example for Table 1

Part Number		EPF	10K130E	Q	C	240	-1	X
Device		FLEX 10K130E
Package		Quad flat pack
Temperature		Commercial range
Pin Count		240 pins
Speed Grade		-1 speed grade
Suffix		Has phase-locked loops (PLLs)

Part Number Prefix	Device Family
*Table 2. Altera Part Number Prefixes*
EP1AGX	Arria GX (with transceivers)
EP2AGX	Arria II GX (with transceivers)
EP1C	Cyclone
EP1M	Mercury
EP1S	Stratix
EP1SGX	Stratix GX (with transceivers)
EP20KxxxC (1)	APEX 20KC
EP2A	APEX II
EP2C	Cyclone II
EP2S	Stratix II
EP2SGX	Stratix II GX (with transceivers)
EP3C	Cyclone III
EP3SL	Stratix III L (Logic Enhanced)
EP3SE	Stratix III E (DSP/Memory Enhanced)
EP4CE	Cyclone IV (Enhanced)
EP4CGX	Cyclone IV GX (with transceivers)
EP4SE (2)	Stratix IV E (Enhanced)
EP4SGX (2)	Stratix IV GX (with transceivers)
EP4S40/100	Stratix IV GT (with transceivers)
EPM	MAX II MAX IIG (Lower Power) MAX IIZ (Zero Power)
EPXA	Excalibur

Part Number Example for Table 2

Part Number		EP	1S25	F	780	C	6
Device		Stratix 1S25
Package		FineLine BGA package
Pin Count		780 pins
Temperature		Commercial range
Speed Grade		6 speed grade
Suffix		None

Notes:

xxx = Any three numbers
EP4SE, EP4SGX, EP2AGX, and EP4CGX devices use package sizes in place of pin counts

Part Number Prefix	Device Family
*Table 3. Altera Stratix V Part Number Prefixes*
5SGX	Stratix V GX (with 12.5-Gbps transceivers)
5SGS	Stratix V GS (with 12.5-Gbps transceivers and high DSP capability)
5SGT	Stratix V GT (with 28-Gbps transceivers)
5SE	Stratix V E with up to 1,100K LEs

Part Number Example for Table 3.

Part Number	5SGX	M	A5	K	3	F	40	C	2	(L)	(N)	(ES)
Family Signature
Embedded HardCopy Blocks
Device Member Code
Number of Transceivers
Transceiver Speed
Package Type
Package Size
Temp Grade
Core Speed Grade
Optional Extension
RoHS Compatible
Suffix

Notes:

5SGX, 5SGS, 5SGT, and 5SE devices use package sizes in place of pin counts

Part Number Prefix	Device Family
*Table 4. Altera HardCopy Series Part Number Prefixes*
HC4GX	HardCopy IV GX (with transceivers)
HC4E	HardCopy IV E
HC3	HardCopy III
HC2	HardCopy II

Part Number Examples for Table 4

Part Number		HC4GX25F			F	1152
Device		HardCopy IV GX 25 in a performance-optimized flip-chip package
Package		FineLine BGA package
Pin Count		1,152 pins

Part Number		HC4E35F			F	1152
Device		HardCopy IV E 35 in a performance-optimized flip-chip package
Package		FineLine BGA package
Pin Count		1,152 pins

Part Number		HC335L			F	1152
Device		HardCopy III 35 in cost-optimized flip-chip package
Package		FineLine BGA package
Pin Count		1,152 pins

Part Number		HC230			F	1020
Device		HardCopy II 230
Package		FineLine BGA package
Pin Count		1,020 pins

Device Codes

To find out which devices are available in a particular device family, or to find out more about a particular device, check the specific device's data sheet.

Package Codes and Pin Counts

Package codes are the same in all part number formats (see Table 4). Immediately following the package code is the pin count. For example, a 780-pin count FineLine BGA package type would be represented by F780. For the EP4SE, EP4SGX, EP2AGX, and EP4CGX FPGA families, the package code is not followed by the pin count, but by the package dimensions. The translation from the pin count to the package dimension is provided below (see Table 5).

Code	Package Type
*Table 4. Package Codes*
B	Ball-grid array	BGA
D	Ceramic dual in-line package	CerDIP
E	Plastic enhanced quad flat pack	EQFP
F	FineLine BGA package	FBGA
G	Ceramic pin-grid array	PGA
H	Hybrid FineLine BGA package	HBGA
L	Plastic J-lead chip carrier	PLCC
M	Micro FineLine BGA package	MBGA
N	Quad flat no-lead	QFN
P	Plastic dual in-line package	PDIP
Q	Plastic quad flat pack	PQFP
R	Power quad flat pack	RQFP
S	Small outline integrated circuit	SOIC
T	Thin quad flat pack	TQFP
U	Ultra FineLine BGA package	UFBGA

Package Size	Pin Count
*Table 5. Package Sizes and Pin Counts for EP4SE, EP4SGX, EP2AGX, EP4CGX, and EP4CE Devices*
U17	U358
F25	F572
F29	F780
F35	F1152
F40	F1517
F43	F1760
F45	F1932
H29	H780
H35	H1152
N11	QFN148

Part Number Example for Table 5

Part Number		EP	1S25	F	28	C	6
Device		Stratix 1S25
Package		FineLine BGA package
Pin Count		780 pins
Temperature		Commercial range
Speed Grade		6 speed grade
Suffix		None

Temperature Codes

Temperature codes are the same for all part number formats (see Table 5).

Code	Explanation
*Table 6. Temperature Codes*
C	Commercial temperature range (0 to 85°C)
I	Industrial temperature range (-40 to 100°C)
A	Automotive temperature range (-40 to 125°C)

Speed Grades

Altera MAX and Classic devices use the speed grade to indicate the delay in nanoseconds (ns) through a macrocell in the device. For example, a MAX device with a -10 speed grade has a delay of 10 ns through a macrocell. Devices with low speed grade numbers run faster than devices with high speed grade numbers.

Altera Stratix series, Cyclone series, MAX II, MAX IIG, MAX IIZ, FLEX, ACEX, APEX, Mercury, and Excalibur devices use the speed grade to indicate the relative performance of the device. Devices with low speed grade numbers run faster than devices with high speed grade numbers. For example, a Stratix III FPGA with a 3 speed grade is the fastest available Stratix III FPGA.

Suffixes

Suffixes are optional letters at the end of a part number that specify certain device features. Not all suffixes are available with all part numbers (see Table 7).

Code	Explanation
*Table 7. Suffix Codes*
A	Aluminum process
C	Device shipped in a carrier
DX	FLEX EPF10K100 devices with phase-locked loops (PLLs)
ES	Engineering sample
F	Fixed programming algorithm (for use with in-circuit testers)
H	Special dry-packing shipment option for MAX 7000 devices
L	Stratix III: 0.9-V core voltage
N	RoHS compliant
P	Special PCI-compliant MAX devices
T	Classic devices: Permanently set in turbo (high-speed) mode
T	MAX 7000 devices: Special timing parameters (see data sheet for details)
V	5.0-V tolerant inputs
X	PLLs in APEX and FLEX 10KE devices
Z	Low-power FLASHLOGIC devices (discontinued)

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