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HardCopy ASICs: Technology for Business

Stratix Series, Harcopy Series - Main Graphic

HardCopy System Development Methodology HardCopy IV (E and GX) Family
HardCopy Series Benefits HardCopy III Family
Getting Started with HardCopy Designs HardCopy II Family

HardCopy® ASICs—now with 6.5+-Gbps transceivers.

Altera's design methodology enables you to take your system designs from prototyping into volume production much faster AND with much less risk.

Using Stratix® FPGA series-based low-risk prototyping for HardCopy ASICs allows you to create one design using one methodology, one tool, and one company and then ramp production when it makes sense for your market.

By choosing Altera's HardCopy ASICs, you reduce your development time and product development risk:

  • Design once, delivering both the FPGA design and the ASIC design
  • Design using one set of intellectual property (IP) for both FPGA and ASIC implementation
  • Design using one tool—Quartus® II development software 
  • Use one supplier for both FPGA and ASIC

Figure 1 shows the relative density of the HardCopy series.

Figure 1. HardCopy Series

Figure 1. HardCopy Series
View Full Size

Find out what customers are saying about HardCopy ASICs and their HardCopy ASIC experiences.

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