MAX 7000 High-Performance CPLDs
Altera's MAX® 7000 CPLDs are based on the advanced Multiple Array Matrix (MAX) architecture and offer world-class, high-performance solutions for a broad array of applications. Manufactured on an advanced CMOS process, the electrically-erasable programmable read-only memory (EEPROM)-based MAX 7000 products provide instant-on capability, and offer densities from 32 to 512 macrocells with pin-to-pin delays as fast as 3.5 ns. MAX 7000 devices support in-system programmability (ISP) and can be easily reconfigured in the field. Altera offers MAX 7000 devices with 5.0-V, 3.3-V, and 2.5-V core operating voltages, as shown in Table 1.
|Table 1. MAX Device Offerings|
|Density (Macrocells)||MAX 7000S (5.0 V)||MAX 7000AE (3.3 V)||MAX 7000B (2.5 V)||Fastest tPD (ns) (1)|
Note to Table 1:
- tPD = Datapath delay from input to non-registered output
Advanced I/O Standards
Altera's MultiVolt™ interface allows designers to seamlessly integrate MAX 7000 designs at 1.8-V, 2.5-V, 3.3-V, and 5.0-V logic levels. Along with the MAX 7000B device's advanced I/O support of GTL+, SSTL-2, SSTL-3, and 64-bit 66-MHz PCI, MAX devices are ideal for many high-speed logic interface applications.
|Table 2. MAX 7000 I/O Support|
|Device||Core Voltage||Input Voltage||Output Voltage||Advanced I/O Support|
|1.8 V||2.5 V||3.3 V||5.0 V||1.8 V||2.5 V||3.3 V (1)||5.0 V||GTL+||SSTL 2/3||64-Bit, 66-MHz PCI|
|MAX 7000S||5.0 V|
|MAX 7000AE||3.3 V|
|MAX 7000B||2.5 V|
Note to Table 2:
- 3.3-V outputs are compatible with 2.5-V and 5.0-V systems.
Broad Range of Packages
MAX 7000 devices are available in a broad range of packages. From traditional quad flat pack (QFP) to the advanced space-saving 1.0 mm FineLine BGA®, MAX 7000 devices satisfy today's design needs by offering a comprehensive packaging selection. All of the packages are optimized to support density migration, where different density devices in the same package have the same pin-out. The FineLine BGA® packages feature the SameFrame™ pin-out structure, which provides I/O migration within the same density. These migration options provide added flexibility in case design requirements change. Table 3 lists the package offerings for the MAX 7000 devices.
MAX 7000S, MAX 7000AE, and MAX 7000B devices are pin-to-pin compatible in the same package. By choosing MAX devices, a design engineer can save engineering time and shorten the design cycle if the logic requirement changes, since there is no need to alter the pin assignments.
|Table 3: MAX 7000 Device Package Offerings|
|Package||MAX 7000B (2.5 V)||MAX 7000AE (3.3 V)||MAX 7000S (5.0 V)|
|Plastic J-Lead Chip Carrier (PLCC)|
|Thin Quad Flat Pack (TQFP)|
|Plastic Quad Flat Pack (PQFP)|
|Power Quad Flat Pack (RQFP)|
|1.0-mm Pitch FineLine BGA|
|0.8-mm Pitch UBGA|
More information on device packaging is available on the Device Packaging Specifications web page.
Superior Silicon Features
MAX 7000 devices are instant-on and non-volatile, and offer global clocking, in-system programmability, open-drain output, programmable power-up states, fast input set-up times, and programmable output slew-rate controls. Combined with many other silicon features, MAX 7000 devices can address a broad range of system-level applications.
Easy-to-Use Design Software
MAX devices are supported by the easy-to-use Quartus® II Web Edition and MAX+PLUS® II BASELINE design software. Both platforms provide synthesis, place-and-route, design verification, and device programming, and can be downloaded at no cost from the design software section of Altera's web site. The complimentary development tools available for designing with MAX devices help minimize the total development cost of end-user systems.
To sample or to purchase MAX 7000 devices, contact the nearest sales representative or distributor.