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Home > Products > Devices > MAX 7000 CPLD Family Overview Print This Page
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MAX 7000 CPLD Family Overview

MAX on Board

Altera's MAX® 7000 CPLD family provides a high-performance programmable logic solution with densities ranging from 600 to 10,000 usable gates (32 to 512 macrocells). With predictable performance, instant-on capability and breadth of packaging options, MAX 7000 is the most comprehensive programmable logic solution in its density class.

Tables 1 to 3 list the offerings of the MAX 7000B, MAX 7000AE, and MAX 7000S devices.

Table 1. MAX 7000B Device Overview (2.5 V)
Feature Device
EPM7032B EPM7064B EPM7128B EPM7256B EPM7512B
Usable Gates 600 1,250 2,500 5,000 10,000
Macrocells 32 64 128 256 512
Maximum User I/O Pins 36 68 100 164 212
tPD (ns) (1) 3.5 3.5 4.0 5.0 5.5
tSU (ns) (2) 2.1 2.1 2.5 3.3 3.6
tFSU (ns) (3) 1.0 1.0 1.0 1.0 1.0
tCO1 (ns) (4) 2.4 2.4 2.8 3.3 3.7
fCNT (MHz) (5) 303.0 303.0 243.9 188.7 163.9
Device Availability Buy Now Buy Now Buy Now Buy Now Buy Now
Package I/O Pins
44-Pin PLCC (6) 36        
44-Pin TQFP (7) 36 36      
49-Pin Ultra FineLine BGA® (8) 36 41      
100-Pin TQFP   68 84 84  
100-Pin FineLine BGA(9)   68 84    
144-Pin TQFP     100 120 120
169-Pin Ultra FineLine BGA       141 141
208-Pin PQFP (10)       164 176
256-Pin FineLine BGA     100 164 212
256-Pin BGA (11)         212

Table 2. MAX 7000AE Device Overview (3.3 V)
Feature Device
EPM7032AE EPM7064AE EPM7128AE EPM7256AE EPM7512AE
Usable Gates 600 1,250 2,500 5,000 10,000
Macrocells 32 64 128 256 512
Maximum User I/O Pins 36 68 100 164 212
tPD (ns) (1) 4.5 4.5 5.0 5.5 7.5
tSU (ns) (2) 2.9 2.8 3.3 3.9 5.6
tFSU (ns) (3) 2.5 2.5 2.5 2.5 3.0
tCO1 (ns) (4) 3.0 3.1 3.4 3.5 4.7
fCNT (MHz) (5) 227.3 222.2 192.3 172.4 116.3
Device Availability Buy Now Buy Now Buy Now Buy Now Buy Now
Package I/O Pins
44-Pin PLCC (6) 36 36      
44-Pin TQFP (7) 36 36      
84-Pin PLCC     68    
100-Pin TQFP   68 84 84  
100-Pin FineLine BGA (9)   68 84 84  
144-Pin TQFP     100 120 120
208-Pin PQFP (10)       164 176
256-Pin FineLine BGA     100 164 212
256-Pin BGA (11)         212

Table 3. MAX 7000S Device Overview (5.0 V)
Feature Device
EPM7032S EPM7064S EPM7128S EPM7160S EPM7192S EPM7256S
Usable Gates 600 1,250 2,500 3,200 3,750 5,000
Macrocells 32 64 128 160 192 256
Maximum User I/O Pins 36 68 100 104 124 164
tPD (ns) (1) 5.0 5.0 6.0 6.0 7.5 7.5
tSU (ns) (2) 2.9 2.9 3.4 3.4 4.1 3.9
tFSU (ns) (3) 2.5 2.5 2.5 2.5 3.0 3.0
tCO1 (ns) (4) 3.2 3.2 4.0 3.9 4.7 4.7
tCNT (MHz) (5) 175.4 175.4 147.1 149.3 125.0 128.2
Device Availability Buy Now Buy Now Buy Now  Buy Now Buy Now  Buy Now
Package I/O Pins
44-Pin PLCC (6) 36 36        
44-Pin TQFP (7) 36 36        
84-Pin PLCC   68 68 64    
100-Pin PQFP (10)     84      
100-Pin TQFP   68 84 84    
160-Pin PQFP     100 104 124  
208-Pin PQFP           164
208-Pin RQFP (12)           164

Notes:

  1. tPD (ns) = Data path delay from input to non-registered output
  2. tSU (ns) = Global clock setup time
  3. tFSU (ns) = Global clock setup time of fast input
  4. tCO1 (ns) = Delay from global clock to output
  5. fCNT (ns) = 16-bit counter internal global clock frequency
  6. PLCC = Plastic J-lead chip carrier
  7. TQFP = Thin plastic quad flat pack
  8. Ultra FineLine BGA = 0.8-mm pitch ball-grid array
  9. FineLine BGA = 1.0-mm pitch ball-grid array
  10. PQFP = Plastic quad flat pack
  11. BGA = Ball-grid array
  12. RQFP = Power quad flat pack

To sample or to purchase MAX 7000 devices, contact your nearest Altera® sales representative or distributor.

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