Configuration of SRAM-Based Look-Up Table PLDs
Designers often use enhanced configuration devices, such as the Altera® EPC4, EPC8, and EPC16 devices, to configure FPGAs upon power up. An enhanced configuration device core is composed of two pieces of silicon: the controller and the flash memory. In the EPC16 configuration device, the flash memory is an LHF16J061 manufactured by Sharp Microelectronics and can be used to configure APEX™ II, APEX 20K, Mercury™, ACEX™, and FLEX 10K® devices. An external processor or PLD, such as an Altera MAX® PLD, can be used to control the flash memory to reset it or overwrite its contents. This external PLD controller can access any unused locations of the flash memory to store application codes. Figure 1 shows the connections between a FPGA, an enhanced configuration device, and an external PLD controller in serial configuration mode.
Figure 1. Configuration of a LUT Device in Serial Configuration Mode
The EPC16 device's flash memory is divided into three blocks: the boot block, the parameter block, and the main block. The boot block can replace a dedicated boot EPROM for a microprocessor or store other system data. The parameter block stores small, frequently updated parameters. The main block contains configuration and user memory space. All three flash memory blocks are protected from accidental modification via the flash interface pins that can be accessed by the external PLD controller.
MAX Devices Ease Remote Configuration
MAX devices, being easy to use and of relatively low density, are well-suited as the external PLD controller in the configuration system depicted in Figure 1. Designers often choose to use external MAX devices to manage SRAM-based configurations because these non-volatile PLDs make system upgrades much easier. By using MAX devices, the configuration device's flash memory can be remotely reset and overwritten while the SRAM device is in user mode, and the SRAM device does not have to be reset immediately.
In addition, the MAX device can time out and reset both the SRAM device and the configuration device should there be any error in the configuration process. The SRAM device and configuration device will not indefinitely remain in an unknown state.
An alternative way of using MAX devices to manage the configuration of FPGAs is in direct configuration through flash memories. A designer can use flash memory to store configuration data just like the flash memory block in an EPC16 device. A flash memory controller, similar to the controller block of an EPC16 device, is required to read and write to the flash memory and perform configuration. MAX devices can implement a flash memory controller to program the flash memory, configure the SRAM-based LUT devices, and verify the contents of the flash memory. Figure 2 shows the connections between a flash memory, a MAX device, and a LUT device in serial configuration mode.
Figure 2: Configuration of LUT Devices Using Flash Memory & MAX Device
For technical information on how MAX devices can help manage the configuration process of SRAM devices using enhanced configuration devices, refer to the Enhanced Configuration Devices (EPC4, EPC8, & EPC16) Data Sheet chapter of the Configuration Handbook.
Chapter 10. Using Flash Memory to Configure FPGAs discusses in detail how flash memories and MAX devices can be used together to configure look-up table devices. This chapter explains the flash memory controller's design specifications as implemented into a MAX device. You can download sample design files for the flash memory controller from the Configuration Handbook web page.
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