Altera Home Page
Literature Licensing
Buy On-Line Download

  Home   |   Products   |   Support   |   End Markets   |   Technology Center   |   Education & Events   |   Corporate   |   Buy On-Line  
  Devices   |   Design Software   |   Intellectual Property   |   Design Services   |   Dev. Kits/Cables   |   Literature  

 High-End FPGAs
      About Stratix Series
   Stratix IV (E and GX)
   Stratix III (L and E)
   Stratix II (and GX)
   Stratix (and GX)
  
 Midrange FPGAs
   Arria (GX)
  
 Low-Cost FPGAs
   Cyclone III
   Cyclone II
   Cyclone
  
 CPLDs
   MAX II (and G, Z)
   MAX 3000A
  
 ASICs
      About HardCopy Series
   HardCopy IV (E and GX)
   HardCopy III
   HardCopy II
   HardCopy Stratix
  
 Device-Specific Offerings
   RoHS Compliant
      Extended Temperature
      Industrial Temperature
      Military Temperature
      Automotive Temperature
  
 Configuration Devices
   Enhanced Configuration
   Serial Configuration
  
 Mature Products
      Product Listing
  

I/O Transceivers & Buffers

MAX 7000B devices are the only product-term-based programmable logic devices (PLDs) that support GTL+ and SSTL-2 and SSTL-3 standards. These standards are common in processor interfaces, backplane drivers, and synchronous dynamic random access memory (SDRAM) interfaces.

I/O Transceivers & Buffers

Many of these applications call for the use of product-term-based PLDs to implement control and decode logic. Discrete I/O drivers or transceivers are usually required to convert the signals from GTL+ or SSTL-2 and SSTL-3 signals to LVCMOS or LVTTL.

Because MAX 7000B devices can directly interface with these advanced I/O standards, discrete drivers are not required when designers use MAX 7000B devices. Using a single MAX 7000B device, a designer can incorporate logic in high-performance designs and at the same time replace external drivers. This integration eliminates additional chip-to-chip delays and saves valuable board space. See Figure 1.

Figure 1: MAX 7000B Device
Figure 1: MAX 7000B Device

MAX 7000B devices can replace discrete GTL+ and SSTL-2 and SSTL-3 drivers that are readily available from many semiconductor manufacturers, as long as requirements for the number of I/O pins and the current drive are met. The number of I/O pins is the limiting factor when LVTTL or LVCMOS is the output standard, whereas the current drive is the limiting factor when GTL+ or SSTL-2 and SSTL-3 is the output standard.

As shown in Figure 2, MAX 7000B devices contain two I/O banks and each I/O bank has its own VCCIO pins. Each bank can independently support a different I/O standard. Within a bank, any one of the terminated standards can be supported.

Figure 2: I/O Banks in MAX 7000B devices

Figure 2:  I/O Banks in MAX 7000B devices

Each MAX 7000B device also has two VREF pins that can each be set to separate VREF levels. Any I/O pin that uses one of the voltage-referenced advanced I/O standards (GTL+, SSTL-2, SSTL-3) can use either of the two VREF pins.

For more technical details on how to integrate I/O transceivers and buffers, refer to AN 293: Using MAX 7000B Devices to Replace I/O Drivers.

  Please Give Us Feedback