MAX 9000 Device Family
 The MAX® 9000 programmable logic device (PLD) family provides a variety of system-level features, including in-system programmability (ISP), built-in Joint Test Action Group (JTAG) boundary-scan test support, and MultiVolt™ I/O capability.
Table 1 gives an overview of the MAX 9000 product family.
| Table 1. MAX 9000 Device Overview |
| |
EPM9320
EPM9320A |
EPM9400 |
EPM9480 |
EPM9560
EPM9560A |
| Macrocells |
320 |
400 |
480 |
560 |
| Usable Gates |
6,000 |
8,000 |
10,000 |
12,000 |
| Maximum User I/O Pins |
168 |
159 |
175 |
216 |
| tPD (ns) |
10 |
15 |
15 |
10 |
| tFSU (ns) |
3.0 |
5.0 |
3.0 |
3.0 |
| tFCO (ns) |
4.5 |
7.0 |
4.8 |
4.8 |
| fCNT (MHz) |
144 |
118 |
144 |
144 |
Table 2 details the pin and package options available for MAX 9000 devices.
| Table 2. MAX 9000 Device Package Offerings |
| Device |
Pin/Package Options (1) |
I/O Pins |
Speed Grade |
| EPM9320A |
84-Pin PLCC
208-Pin RQFP
356-Pin BGA |
60
132
168 |
10 |
| EPM9320 |
84-Pin PLCC
208-Pin RQFP
280-Pin PGA
356-Pin BGA |
60
132
168
168 |
-15, -20 |
| EPM9400 |
84-Pin PLCC
208-Pin RQFP
240-Pin RQFP |
59
139
168
159 |
-15, -20 |
| EPM9480 |
208-Pin RQFP
240-Pin RQFP |
146
175 |
-15, -20 |
| EPM9560A |
208-Pin RQFP
240-Pin RQFP
356-Pin BGA |
153
191
216 |
-10 |
| EPM9560 |
208-Pin RQFP
240-Pin RQFP
280-Pin PGA
304-Pin RQFP
356-Pin BGA |
153
191
216
216
216 |
-15, -20 |
Note:
-
PLCC = plastic J-lead chip carrier
RQFP = power quad flat pack
BGA = ball-grid array
PGA = pin-grid array
Table 3 highlights the features of the MAX 9000 device family.
| Table 3. MAX 9000 Device Family Features |
| Feature |
Benefit |
| 6,000 to 12,000 usable gates |
Improves system integration |
| 320 to 560 macrocells |
Ideal for gate-array prototyping |
| 10-ns propagation delays |
Increases in-system performance to 144 MHz |
| Support for the JEDEC-approved Jam Standard Test and Programming Language (STAPL) |
Ease of use for embedded processor and ICT programming applications |
| In-system programmability (ISP) |
Easy prototyping
In-field upgrades
Simplifies manufacturing flow |
| MultiVolt I/O operation: 5.0 V and 3.3 V |
Ideal for mixed-voltage systems |
| Built-in JTAG support |
Simplifies device and system testing |
MAX 9000 Architecture
Ranging from 320 to 560 macrocells (6,000 to 12,000 usable gates), the MAX 9000 family has propagation delays from 10 to 20 ns and typical in-system performance of 145 MHz.
The product-term-based macrocells offer a dual-output structure that allows the register and product terms to be independently configured for up to 20% higher resource utilization than conventional single-output structures. Register-intensive portions of a design can use the macrocell's register, while combinatorial portions of a design use the associated product terms.
In addition, the devices in each MAX 9000 package type are function- and pin-compatible. This compatibility makes it easy to migrate designs from one density level to another while maintaining pin assignments, eliminating the need for board layout changes.
Board Area Efficiency
MAX 9000 devices allow engineers to integrate lower density devices into a single MAX 9000 device. This saves valuable board space (as shown in Table 4), lowers costs, and eliminates on-chip/off-chip delays.
| Table 4. Board Area Efficiency: Macrocells per cm² |
| Macrocells |
Package
84-pin PLCC |
Macrocells |
Package
208-pin RQFP |
| 64 |
7 |
256 |
27 |
| 128 |
14 |
320 |
34 |
| 160 |
17 |
480 |
51 |
| 320 |
35 |
560 |
59 |
Flexibility with ISP
MAX 9000 ISP-capable devices streamline manufacturing and increase design flexibility. With ISP, a MAX 9000 device can be mounted on a printed circuit board before programming, eliminating the need to handle the device and reducing damage to the leads of high-pin-count quad flat pack (QFP) packages. The ISP interface for the MAX 9000 family uses the industry-standard JTAG test ports, allowing MAX 9000 devices to be programmed and the printed circuit board to be functionally tested in a single manufacturing step. MAX 9000 devices also support the JEDEC-approved Jam Standard Test and Programming Language (STAPL) for ease of use in embedded processor and in-circuit tester (UCT) programming applications.
Like all Altera® ISP-capable devices, the MAX 9000 family receives full Altera ISP support. More information is available on the Altera Support for In-System Programmability web page.
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