Step 3: Delivering Stratix II with High Performance

This page is the third of three pages that describe the high-performance Stratix^® II FPGA development process:

• Step 1: Defining Stratix II Logic Structure
• Step 2: Designing Stratix II Adaptive Logic Module
• Step 3: Delivering tomorrow's performance today with Stratix II FPGAs

The exhaustive defining and designing efforts of the Stratix^® II FPGA's adaptive logic module (ALM) based on real customers' requirements produced the highest-performance FPGA architecture in the industry. Recent benchmarks and analysis prove that when designing with industry-leading Quartus^® II design software, the Stratix II FPGA family is the performance leader. (See Figure 1 and Table 1 for details.)

Figure 1. Relative FPGA Core Performance Comparison

Benefits of Stratix II FPGA's High Performance

• Faster timing closure easily meeting your design’s performance requirements
• Reduction in cost by using a slower speed-grade device while still meeting performance goals
• Risk free design implementation due to process maturity and extra system level margins
• Implementation of new high-performance features in your system that are unachievable using competitive devices

Benchmarking Methodology

Altera has a third-party, industry-expert-endorsed performance benchmarking methodology, which is used to compare FPGA performance between both families from a single FPGA vendor and between competitive solutions. Altera ensures a consistent benchmarking environment when testing both Altera and competitor devices.