Step 2: Designing Stratix II Adaptive Logic Module (ALM)

This page is the second of three pages that describe the high-performance Stratix^® II FPGA development process:

Defining the logic structure was a crucial step in the designing of Stratix II FPGAs. However, additional features were designed into the ALMs—the basic building block of Stratix II devices—that maximized efficiency and performance. The available resources in the ALM are shown in Figure 1 and are listed in Table 1.

Figure 1. Stratix II ALM

Figure 1. Stratix II ALM

Available Resources per ALM	Advantages
*Table 1. Stratix II ALM Features*
8-Input Fracturable LUT	Can Implement a full 6-LUT, select 7-input functions and be fractured into independent smaller LUTs, such as two independent 4-input LUTs. Quartus^® II software design suite integrates this fracturability and optimizes for performance, efficiency, power, and area (more logic capacity and less wasted logic)
2 Embedded Adders	Allows for two bits of addition per ALM or a single ternary adder without any additional resources Operands can be generated from the same ALM and do not require any additional logic
2 Registers	Optimal register-to-logic ratio to ensure device is not register-limited Abundance in registers for register-rich applications or pipeline designs for performance
2 Outputs	The inputs of a single ALM can be flexibly divided between the two output functions, allowing wide input functions to run fast and narrow input functions to efficiently use remaining resources.

The ability to expand and share the LUT inputs allows each Stratix II ALM to absorb more logic capacity than traditional 4-input LUT structures for an equivalent function. The larger logic capacity in Stratix II ALMs not only reduces the total logic utilization but also reduces the average routing utilization (shown in Figure 2) improving the overall performance of your design.

Figure 2. Stratix II Devices Reduce Average Routing Utilization

Figure 2. Stratix II Devices Reduce Average Routing Utilization

Stratix II Logic Structure Benefits

Produces shorter combinatorial logic levels to achieve 50% faster performance compared to previous generation FPGA.
Is fully integrated with Quartus II software to optimally utilize the 8-input fracturable LUT in the ALM and the routing interconnect architecture of Stratix II FPGAs.
More efficient and very little logic wasted compared to the nearest competing logic cell.

*Table 2. Learn More about Stratix II FPGAs*
Topic	Description
Performance Comparison	Compare Stratix II Performance with Competing Devices
Technical Papers	The Stratix II Logic and Routing Architecture Technical Paper
	Improving FPGA Performance and Area Using an Adaptive Logic Module
	Fracturable FPGA Logic Elements
Architecture	FPGA Architecture White Paper
	Performance and Logic Efficiency Analysis White Paper
	8-Input Fracturable LUT in the ALM
	Design Building Blocks
	Embedded Adders
DSP	DSP Blocks
DSP	DSP Performance Center

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Step 2: Designing Stratix II Adaptive Logic Module (ALM)

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Stratix II Logic Structure Benefits