Serial Configuration Devices Advanced Features
Altera's serial configuration devices are the lowest cost configuration devices in the programmable logic industry. The serial configuration devices have an advanced feature set that includes in-system programmability (ISP) and flash memory access, in board-space-saving, small-outline integrated circuit (SOIC) packages. This makes them the perfect complement to the Cyclone® FPGA series in addressing high-volume, price-sensitive applications. They also provide an ideal low-cost, small form-factor solution for Altera's Stratix® series.
Industry's First True Low-Cost Solution
You can configure FPGAs in a variety of ways, from using a cable, to downloading from a computer source, to using an on-board microprocessor to pass data from a control memory location. The most popular method is to use a dedicated configuration device because it is an easy, cost-effective way to meet performance needs.
However, despite the inconvenience it causes customers, some FPGA companies are refusing to develop configuration device solutions because of the significant effort and heavy investment required.
Altera is committed to meeting your requirements with the best configuration device solutions at the lowest cost. Today, Altera® serial configuration devices are the lowest cost, smallest foot-print, simplest interface, and highest density devices of their kind.
In-System Programmability for Maximum Flexibility
All Altera serial configuration devices have the capability for ISP. This feature increases design flexibility by allowing in-system design updates, and reduces costs by streamlining manufacturing. Altera provides ISP support in serial configuration devices via Altera's active serial programming interface (shown in Figure 1).
When a design goes into volume production, designers using one-time-programmable configuration devices must remove these devices and replace them with new parts for system upgrades. With ISP capability in the serial configuration device, you can easily perform system upgrades by using an on-board processor, or either a ByteBlaster™ II or a ByteBlaster USB programming cable to significantly reduce downtime and cost.
If board area is limited, Altera serial configuration devices can be programmed using a JTAG port through the FPGA. Quartus® II software can automatically download the FlashLoader design to make the FPGA into a JTAG programmer of the serial configuration devices (shown in Figure 2).
Figure 1. ISP Through Active Serial Programming Interface
Figure 2. ISP Through JTAG Programming Interface
Flash Memory Access for Large Memory Requirements
Altera's serial configuration devices provide up to 64 Mbits of flash memory. The unused portions of the flash memory can be used as general-purpose memory. You can access this general-purpose memory using a Nios® or Nios II embedded processor (shown in Figure 3), which makes the serial configuration devices a complete combination flash and configuration solution.
You can even use this memory as a ROM for your embedded processor's boot-loader program, which can reduce board space requirements, eliminate the need for an extra on-board memory module, and ultimately reduce the overall cost of the system.
Figure 3. Flash Memory Access Using Nios and Nios II Processors
Small Form Factor Saves Valuable Board Space
An important aspect of total design cost is board space. The more board space a solution consumes, the higher the cost of that solution. Altera’s serial configuration devices are packed in 8-pin and 16-pin SOIC packages. The 8-pin package takes up less than 30 square millimeters of board space, which minimizes the amount of board space taken by a complete SOPC solution. Vertical migration is supported for all of the serial configuration devices using the same package.
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