When comparing FPGAs, beware of the inflated part numbers used by competing devices. The innovative Stratix® II logic structure, combined with the technology leadership of Quartus® II software, allows designers to fit more logic in a Stratix II device than in a similarly named Virtex-4 device. For example:
- Stratix II EP2S60 has 18 percent more logic than Virtex-4 XC4VLX60 devices, leaving more headroom for future design growth.
- The biggest Stratix II device, EP2S180, offers 5 percent more logic, 50 percent more memory, 4X more digital signal processing (DSP) resources, and 21 percent more user I/O pins than the XC4VLX200 device.
Derived from the latest density benchmarking results, Figure 1 shows a Stratix II and Virtex-4 logic density comparison normalized to equivalent 4-input look-up tables (LUTs).
Figure 1. Stratix II vs. Virtex-4 Logic Density Comparison
Density Benchmarking
The basic logic structure of a Stratix II FPGA is an adaptive logic module (ALM), while the basic logic structure of a Virtex-4 FPGA is called a slice. To provide a fair comparison, benchmark analysis was conducted on over 70 customer designs using Synplify software version 8.0, Quartus II software version 5.0, and ISE software version 7.1i service pack 1. The method used fixed performance with optimizations for area. The results are shown in Figure 2.
Figure 2. Stratix II ALM vs. Virtex-4 Slice Benchmark
On average, one Stratix II ALM is equivalent to 1.3 Virtex-4 slices. Therefore, a Stratix II EP2S60 device (with 24,176 ALMs) has 18 percent more logic capacity than a Virtex-4 XC4VLX60 (with 26,624 slices). Detailed descriptions of the benchmarking methodology can be found in the Stratix II vs. Virtex-4 Density Comparison white paper. In addition, publicly available open core designs are used to further validate the density benchmark result.
The Stratix II density advantage comes from two main factors:
- Stratix II ALMs are more efficient than Virtex-4 slices
- Quartus II software is better at area optimization than ISE
Stratix II ALM Architectural Advantage
The new and innovative logic structure of Stratix II devices delivers unprecedented capacity. Table 1 shows a simple function logic resource consumption between the Stratix II and Virtex-4 families. The Stratix II ALM’s wide-input LUT and flexible LUT size support make the Stratix II family more efficient for area utilization.
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Table 1. Simple Function Resource Consumption Comparison Between Stratix II & Virtex-4 FPGAs |
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Function |
Stratix II |
Virtex-4 |
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6-Input Function |
1 ALM |
2 Slices |
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2-Bit 3-Input Adder |
1 ALM |
2 Slices |
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4x2 Crossbar Switch |
1 ALM |
2 Slices |
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16-Bit Barrel Shifter |
19 ALMs |
34 Slices |
Quartus II Design Software
Quartus II software provides leading-edge area optimization algorithms for better area utilization than the competition, while maintaining equivalent performance. Quartus II software also provides better performance optimization. Table 2 shows the Quartus II settings for best area efficiency:
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Table 2. Quartus II Area Optimization Options |
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Options |
Setting |
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Perform WYSIWYG Resynthesis |
On |
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Optimization Technique |
Area |
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Restructure Multiplexers |
On |
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Auto Packed Registers |
Minimize Area Wih Chains |
Overall Stratix II Advantage
Altera’s benchmark results indicate that Stratix II ALMs are more efficient than Virtex-4 slices, and therefore redefine the Stratix II vs. Virtex-4 density comparison. Read the Stratix II vs. Virtex-4 Density Comparison white paper for an in-depth explanation of the benchmarking. Try your design or publicly available open core designs in Quartus II software.
