Stratix® II devices support a variety of single-ended I/O standards, including LVTTL, LVCMOS, SSTL, HSTL, PCI, and PCI-X standards. This enables Stratix II devices to easily interface with backplanes, host processors, buses, memory devices, and other board devices. Single-ended systems provide more current drive capacity than differential I/O standards, and they are critical when working with advanced memory devices such as DDR SDRAM, DDR2 SDRAM, RLDRAM II, and QDRII SRAM devices. Table 1 lists the single-ended I/O standards supported in Stratix II devices.
| Table 1. Stratix II Device Single-Ended I/O Standard Support | ||
| I/O Standard | Performance Target | Typical Application |
|---|---|---|
| 3.3-V/2.5-V LVTTL 1.8-V LVTTL |
300 MHz 250 MHz |
General Purpose SDR SDRAM |
| 3.3-V/2.5-V LVCMOS 1.8-V LVCMOS 1.5-V LVCMOS |
300 MHz 250 MHz 200 MHz |
General Purpose |
| SSTL-2 Class I and II | 200 MHz | DDR SDRAM RLDRAM II |
| SSTL-18 Class I and II | 333 MHz | DDR2 SDRAM |
| 1.8-V HSTL Class I and II | 300 MHz | QDR II SRAM RLDRAM II |
| 1.5-V HSTL Class I and II | 250 MHz | Memory and Switch Fabric |
| 3.3-V PCI | 66 MHz | PC and Embedded |
| 3.3-V PCI-X | 133 MHz | PC and Embedded |
| Differential SSTL-2 Class I and II | 200 MHz | Memory and Switch Fabric |
| Differential SSTL-18 Class I and II | 333 MHz | DDR2 SDRAM |
| Differential 1.8-V HSTL Class I and II | 300 MHz |
QDR II SRAM |
| Differential 1.5-V HSTL Class I and II | 250 MHz | Memory and Switch Fabric |
Related Links
- Parallel I/O Technology Center
- Souce-Synchronous Signaling I/O Standards in Stratix II Devices
- Stratix II Source-Synchronous Protocols
- Selectable I/O Standards in Stratix II Devices chapter of the Stratix II Device Handbook
- High-Speed Differential I/O Interfaces with DPA in Stratix II Devices chapter of the Stratix II Device Handbook
