Based on a 1.2-V, 90-nm, SRAM process, Stratix® II devices offer a wide range of choices to fit your high-performance, high-density logic requirements:
- 15,600 to 179,400 equivalent logic elements (LEs)
- Up to 9 Mbits of on-chip RAM
- Up to 1,170 user I/O pins
- Up to 384 (18x18) embedded multipliers in highly optimized digital signal processing (DSP) blocks
- A rich feature set
- A low-risk path to cost reduction with HardCopy® II ASICs
- Industrial temperature support
For details about Stratix II FPGAs with embedded high-speed transceivers, see the Stratix II GX device pages.
Table 1 outlines the Stratix II device family members and features. Table 2 shows an overview of Stratix II device packaging and I/O pin counts. Table 3 shows industrial temperature support for Stratix II FPGAs.
| Table 1. Stratix II Device Overview | ||||||
| Feature | Device | |||||
|---|---|---|---|---|---|---|
| EP2S15 | EP2S30 | EP2S60 | EP2S90 | EP2S130 | EP2S180 | |
| Adaptive Logic Modules (ALMs) (1) | 6,240 | 13,552 | 24,176 | 36,384 | 53,016 | 71,760 |
| Equivalent LEs (1) | 15,600 | 33,880 | 60,440 | 90,960 | 132,540 | 179,400 |
| M512 RAM Blocks (512 Bits + Parity) | 104 | 202 | 329 | 488 | 699 | 930 |
| M4K RAM Blocks (4 Kbits + Parity) | 78 | 144 | 255 | 408 | 609 | 768 |
| M-RAM Blocks (512 Kbits + Parity) | 0 | 1 | 2 | 4 | 6 | 9 |
| Total RAM bits | 419,328 | 1,369,728 | 2,544,192 | 4,520,448 | 6,747,840 | 9,383,040 |
| DSP Blocks | 12 | 16 | 36 | 48 | 63 | 96 |
| Embedded 18-Bit x 18-Bit Multipliers (2) | 48 | 64 | 144 | 192 | 252 | 384 |
| Phase-Locked Loops (PLLs) (3) | 6 | 6 | 12 | 12 | 12 | 12 |
| Maximum User I/O Pins | 366 | 500 | 718 | 902 | 1,126 | 1,170 |
| Availability | Buy Now | Buy Now | Buy Now | Buy Now | Buy Now | Buy Now |
Notes:
- Each ALM is equivalent to 2.5 LEs.
- Each DSP block in a Stratix II device can implement four 18×18 multipliers or one 36×36 multiplier. To obtain the total number of 36×36 multipliers per device, divide the total number of 18×18 multipliers by a factor of 4.
- Includes both fast and enhanced PLLs.
| Table 2. Stratix II Device Package and Maximum User I/O Pins | ||||||
| Package Size (mm x mm) |
Device | |||||
|---|---|---|---|---|---|---|
| EP2S15 | EP2S30 | EP2S60 | EP2S90 | EP2S130 | EP2S180 | |
| 484-Pin FineLine BGA (FBGA) Package (23 x 23) |
342 | 342 | 334 | |||
| 484-Pin Hybrid FBGA (27 x 27) |
308 (1) | |||||
| 672-Pin FBGA (27 x 27) |
366 | 500 | 492 | |||
| 780-Pin FBGA (29 x 29) |
534 (1) | 534 (1) | ||||
| 1,020-Pin FBGA (33 x 33) |
718 | 758 | 742 | 742 | ||
| 1,508-Pin FBGA (40 x 40) |
902 | 1,126 | 1,170 | |||
- User I/O counts are preliminary and subject to change.
| Table 3. Stratix II Device Industrial Temperature Support | ||
| Device | Package (1) | Speed Grade |
|---|---|---|
| EP2S15 | 484-pin FBGA 672-pin FBGA |
-4 |
| EP2S30 | 484-pin FBGA 672-pin FBGA |
-4 |
| EP2S60 | 484-pin FBGA 672-pin FBGA 1,020-pin FBGA |
-4 |
| EP2S90 | 780-pin FBGA 1,020-pin FBGA 1,508-pin FBGA |
-4 |
| EP2S130 | 780-pin FBGA |
-4 |
| EP2S180 | 1,020-pin FBGA |
-4 |
- BGA: ball-grid array
FBGA: FineLine BGA package
MBGA: Micro FineLine BGA package
UBGA: Ultra FineLine BGA package
PDIP: plastic dual in-line
PLCC: plastic J-lead chip carrier
PQFP: plastic quad flat pack
RQFP: power quad flat pack
SOIC: small-outline integrated circuit
TQFP: thin-quad flat pack
Contact Altera
Altera sells programmable logic devices (PLDs), including Stratix II FPGAs, and development software subscriptions exclusively through sales representatives and distributors. Please contact your local Altera sales representative or distributor listed below.
