Stratix II FPGAs
Implement your high-density logic design with Stratix® II FPGAs and get high performance and great signal integrity in the most efficient device possible. Whether your design is for a single device to prototype an ASIC, or is destined for volume production, you'll benefit from knowing you can migrate from your Stratix II FPGAs to HardCopy® II structured ASICs whenever business conditions require it. Other key Stratix II device features include:
Manufactured on the TSMC low-k dielectric process technology with up to 180K equivalent logic elements (LEs) and 9 Mbits of embedded memory, Stratix II devices are the highest performance and highest density 90-nm FPGAs available. Stratix II devices feature Altera's patented redundancy technology, which dramatically increases yields and lowers device costs. Stratix II FPGAs are also optimized for total device power.
For designs in production, Altera is delivering Stratix II FPGAs in high volume today. For your next generation system designs, Altera offers the latest addition to the Stratix series of high-performance FPGA families, the Stratix III family.
Implemented on a 65-nm process, the Stratix III family contains three device variants—one optimized for high density logic, one optimized for DSP and memory, and one with on-chip high-speed serial transceivers. All Stratix III FPGAs employ Altera's unique Programmable Power Technology and selectable core voltage, enabling Stratix III devices to be optimized for the lowest possible power consumption on a design by design basis. Visit the Stratix III device pages to learn more about the architecture and applications of this innovative FPGA family.
Reach the Highest Performance and Productivity Levels
Reduce design iteration times by up to 70 percent and substantially improve your productivity compared to traditional high-density FPGA design flows by using Quartus® II software, which includes the industry's first incremental compilation feature.
Quartus II software is a comprehensive suite of synthesis, optimization, and verification tools in a single, unified design environment that enables the highest levels of productivity and the fastest path to design completion for high-density FPGA designs.
Low-Cost, No-Risk ASIC Migration Path
With support for migration from Stratix II FPGAs to HardCopy II structured ASICs, Altera offers the industry’s only seamless development path from FPGA prototyping to high-volume, low-cost structured ASIC production. HardCopy II devices further increase performance and reduce power consumption over the FPGA implementation and offer significantly lower unit costs.
Stratix II GX FPGAs—Transceivers With Integrity
Stratix II GX device variants represent Altera's third generation of FPGAs with embedded transceivers. Built using the Stratix II FPGA fabric, Stratix II GX devices integrate up to 20 serializer/deserializer (SERDES)-based transceivers on a single device. Through careful selection of data-rates and a new clocking structure, Stratix II GX devices support a broad spectrum of protocols while dissipating significantly less power than competing solutions.
Best-in-Class Features
Stratix II devices (shown in Figure 1) improve on the Stratix device features that set new standards in FPGAs. New device capabilities—such as the new logic structure and design security technology—round out the industry’s most advanced FPGA feature set.
Figure 1. Stratix II Device Floorplan
Enhance Your Stratix II Design Skills—Register Today
Altera® Technical Training courses ensure your programmable logic skills are up-to-date with the latest tools and technology for cost savings and faster time to market. Take advantage of the newest features in Altera’s Stratix II devices and get design tips for the Quartus II software and related EDA tools to achieve the highest performance and smallest footprint designs. The Altera Technical Training course catalog includes applicable device family literature.
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