Stratix® III FPGAs use the adaptive logic module (ALM) to implement logic functions, which is extremely efficient because of the ALM's fracturability. When compared to the LUT-FF pair of Virtex-5, ALM fracturability provides the following advantages:
- A 1.8x logic packing capability over Virtex-5 devices. Benchmarking results on 65 customer designs show that, on average, the Stratix III ALM is equivalent to (can hold as much logic as) 1.8x the Virtex-5 6-LUTs. This enables customers to save costs by packing more logic in a smaller, less expensive device
- 25 percent faster than Virtex-5 devices, making Stratix III the fastest FPGAs ever
Figure 1 and 2 show the basic building block of Stratix III (ALM) and Virtex-5 (LUT-FF pair).
Figure 1. Stratix III ALM
Figure 2. Virtex-5 LUT-FF Pair
| Table 1. Stratix III ALM and Virtex-5 LUT-FF Pair Feature Comparison | ||
| Feature | ALM | LUT-FF Pair |
|---|---|---|
| Number of LUT Inputs | 8 | 6 |
| Fracturable LUT | Yes | No |
| Register Count per LUT | 2 | 1 |
| Dedicated Full Adders | 2 | 0 |
When implementing logic, the ALM can implement a select set of 7-input functions, all 6-input logic functions, and two independent functions consisting of smaller LUT sizes, such as two independent 4-input LUTs. The ALM requires very few inputs to be shared as shown in table 2, resulting in less wasted logic while maximizing performance and the amount of available logic.
Table 2 shows just a few combinations of function and compares the number of inputs shared for Stratix III FPGAs and Virtex-5.
| Table 2. Stratix III ALM vs. Virtex-5 LUT-FF Pair Flexibility | |||
| Output 1 | Output 2 | Number of Shared Inputs (Minimum) for Virtex-5 LUT |
Number of Shared Inputs (Minimum) for Stratix III ALM |
|---|---|---|---|
| 5-LUT | 5-LUT | 5 | 2 |
| 5-LUT | 4-LUT | 4 | 1 |
| 5-LUT | 3-LUT | 3 | 0 |
| 4-LUT | 4-LUT | 3 | 0 |
| 4-LUT | 3-LUT | 2 | 0 |
| 3-LUT | 3-LUT | 1 | 0 |
For example, implementing a 5-input and a 3-input function, the ALM implements the two independent functions without sharing any inputs, while the LUT-FF pair will either have to share inputs or in the case there are no common inputs, two 6-LUTs must be used resulting in wasted logic.
Figure 3. 5-Input and a 3-Input Function Implementation in the Stratix III ALM and the Virtex-5 LUT-FF Pair
Because of efficient fracturability, the Stratix III ALM has, on average, a 1.8x advantage over the Virtex-5 LUT-FF pair, and the advantage can go as high as 2.3x on certain designs. This is evidenced by the benchmark analysis conducted on a set of 65 customer designs, shown in Figure 4. The horizontal black line at the "1" mark indicates a point at which the number of logic elements for Virtex-5 (LUT-FF pair) and Stratix III (ALMs) are the same.
Figure 4. Logic Efficiency Comparison
| Table 3. Learn More about Stratix III FPGAs | |
| Topic | Description |
|---|---|
| Stratix III vs. Virtex-5 | Stratix III—The World's Fastest FPGAs |
| Stratix III—The World's Biggest FPGAs | |
| White Paper |
Stratix III FPGAs vs. Xilinx Virtex-5 Devices: Architecture and Performance Comparison (PDF) |
| Architecture | Stratix III Device Family Architecture |
| Stratix III ALM Logic Structure's 8-Input Fracturable LUT | |
