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Stratix III FPGA Device Family Overview

The Stratix® III family of high-end FPGAs includes the following two device variants:

  • Stratix III L devices focused on logic-rich applications
  • Stratix III E devices focused on digital signal processing (DSP)-rich and memory-rich applications

Stratix III FPGAs provide vertical migration, not only within, but across the L and E variants to offer the most flexibility in device selection.

Industry Leading Architecture

Altera has taken the industry leading architecture of the Stratix high-performance FPGA series and refined it even further for a 65-nm process node. As a result, Stratix III FPGAs are the ideal solution for your next-generation high-end system designs.

Key feature enhancements Stratix III FPGAs offer include:

  • The lowest power requirements of any high-performance FPGA—up to 50 percent lower than Stratix II devices, without adding the reliability risk of heatsinks or forced-air cooling
  • Higher performance to power next-generation systems—up to a 35 percent gain over Stratix II high-performance FPGAs
  • Increased density that lets you integrate more of your product to reduce cost and reduce board space—up to twice the density of Stratix II FPGAs
  • Development supported by Quartus® II software—customer-acclaimed as the leading development software in productivity for low-power, high-density, high-performance FPGAs
  • High-performance memory interfaces up to 533-MHz DDR3
  • LVDS performance up to 1.6 Gbps and support for Serial Gigabit Media Independent Interface (SGMII) on the LVDS I/Os
Table 1. Stratix III Logic-Rich Device Overview
Stratix III L Family Variants
Device EP3SL50 EP3SL70 EP3SL110 EP3SL150 EP3SL200 EP3SE260 (1) EP3SL340
Adaptive Logic Modules (ALMs) 19,000 27,000 42,600 56,800 79,560 101,760 135,200
Equivalent Logic Elements (LEs) 47,500 67,500 106,500 142,000 198,900 254,400 338,000
Registers 38,000 54,000 85,200 113,600 159,120 203,520 270,400
M9K Memory Blocks 108 150 275 355 468 864 1,040
M144K Memory Blocks 6 6 12 16 24 48 48
Embedded Memory (Kbits) 1,836 2,214 4,203 5,499 7,668 14,688 16,272
MLAB (Kbits) 594 844 1,331 1,775 2,486 3,180 4,225
18 x 18 Multipliers (2) 216 288 288 384 576 768 576
Availability
(Commercial Grade)
Q2 2008
Available
Q2 2008 Available
Buy Now
Q2 2008 Available
Available
Buy Now
User I/O
Package (3) EP3SL50 EP3SL70 EP3SL110 EP3SL150 EP3SL200 EP3SE260 EP3SL340
F484 288 288          
F780 480 480 480 480 480 (4) 480 (4)  
F1152     736 736 736 736 736 (4)
F1517         864 960 960
F1760             1,104

Table 2. Stratix III Enhanced Device Overview
Stratix III E Family Variants
Device EP3SE50 EP3SE80 EP3SE110 EP3SE260
Adaptive Logic Modules (ALMs) 19,000 32,000 42,600 101,760
Equivalent Logic Elements (LEs) 47,500 80,000 106,500 254,400
Registers 38,000 64,000 85,200 203,520
M9K Memory Blocks 400 495 639 864
M144K Memory Blocks 12 12 16 48
Embedded Memory (Kbits) 5,328 6,183 8,055 14,688
MLAB (Kbits) 594 1,000 1,331 3,180
18 x 18 Multipliers (2) 384 672 896 768
Availability
(Commercial Grade)
Available
Q2 2008 Available
Available
User I/O
Package (3) EP3SE50 EP3SE80 EP3SE110 EP3SE260
F484 288      
F780 480 480 480 480 (4)
F1152   736 736 736
F1517       960

Notes to Tables 1 and 2:

  1. The EP3SE260 device (a Stratix III E family variant) provides optimum logic, DSP, and memory for this device density.
  2. For full details on DSP resources for all families see the Stratix III Digital Signal Processing web page.
  3. For full package details, see the Altera® Device Package Information (PDF).
  4. The EP3SE260 and EP3SL200 devices use an H780 package, and the EP3SL340 is in an H1152 package to maintain vertical package migration. These packages require a keep-out area to be created to allow for the overhang of the H package.
Table 3. Package Vertical Migration (1)
Stratix III variant Device F484 F780 F1152 F1517 F1760
Stratix III L
(Logic)
EP3SL50 288 (2) 480      
EP3SL70 288 480      
EP3SL110   480 736    
EP3SL150   480 736    
EP3SL200   480 (3) 736 864  
EP3SL340     736 (3) 960 1,104
Stratix III E
(Enhanced)
EP3SE50 288 480      
EP3SE80   480 736    
EP3SE110   480 736    
EP3SE260   480 (3) 736 960  

Notes to Table 3:

  1. All device densities that are available in the same package are vertically migratable (i.e. they share the same VCC, GND, in-system programmables, and dedicated input pins).
  2. Number of available User I/O pins.
  3. The EP3SE260 and EP3SL200 devices use an H780 package, and the EP3SL340 is in a H1152 package to maintain vertical package migration. These packages require a keep-out area to be created to allow for the overhang of the H package.

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