FPGA, CPLD, and ASIC solutions from Altera
  • Download Center
  • Literature
Sign in/register
myAltera Account
Welcome
  •   myAltera
  •   Logout
  • Products
    • Devices
    • Design Software
    • Intellectual Property
    • Development Kits/Cables
    • Design & Support Services
    • Literature
  • End Markets
    • Automotive
    • Broadcast
    • Computer & Storage
    • Consumer
    • Industrial
    • Medical
    • Military
    • Test & Measurement
    • Wireless
    • Wireline
  • Technology
    • DSP
    • External Memory
    • Embedded Processing
    • Transceivers
    • Parallel I/O
    • Signal Integrity
    • System Integration
  • Training
    • Training Courses
    • University Program
    • Webcasts & Videos
    • Demonstrations
    • Events Calendar
  • Support
    • Design & Support Resources
    • Knowledge Database
    • Devices
    • Design Software
    • Intellectual Property
    • Development Kits/Cables
    • Design Examples
    • Downloads
    • User Communities/Forums
    • mySupport
  • About Altera
    • About Us
    • Environmental
    • Customer Successes
    • Partners
    • Newsroom
    • Investor Relations
    • Jobs
    • Contact Us
  • Buy Online
    • Devices
    • Design Software
    • Development & Education Kits
    • Cables & Programming Hardware
    • Intellectual Property
  • Entire Site
  • Part Number
  • Knowledge Database
  • Support & Technical Docs
  • Forums & Wiki
Username:  
Password:  
 
Forgot my username or password
Don't have myAltera account? Register Now.
Enter your email address:

Stratix IV FPGA Family Architecture

Home > Products > Devices > Stratix IV (E, GX, GT) > Overview > Architecture

Next Steps

  • View Webcast
  • Download Software
  • Get Training
  • Get Reference Design
  • View Video

Buy Now

  • Purchase Devices
  • Purchase Dev Kits

Support

  • View Knowledge Database
  • Use Troubleshooter
  • Join the Altera Forum

Documentation

  • Get Literature
  • Get Handbook (PDF)
  • Get Data Sheet (PDF)
  • Get Email Updates
  • Get White Paper (PDF)

With 40-nm Stratix® IV FPGAs you can reach new levels of system-on-a-chip (SoC) integration. Building on the advanced, proven Stratix III architecture, Stratix IV FPGAs deliver a high-density, feature-rich and high-performance core fabric. Combined with flexible I/Os, high-bandwidth transceivers, and memory interfaces, Stratix IV FPGAs meet the requirements for high-end digital systems in wireless, wireline, military, broadcast, and other market segments. Figure 1 shows the Stratix IV architecture.

Figure 1. Stratix IV FPGA Architecture

Figure 1. Stratix IV FPGA Architecture

For more information on individual features and benefits, please select from the listings below or visit the Stratix IV FPGA overview page.

Key Features Embedded Processing
  • Architecture
  • Performance
  • Density
  • Power
  • DSP Blocks
  • TriMatrix Memory
Connectivity Features supported by Stratix III and Stratix IV FPGAs
  • External Memory Interfaces
  • Flexible I/Os
  • Remote System Upgrades
  • Design Security
  • SEU Mitigation
  • On-Chip Termination
High-Speed Interfaces Risk-Free Path to HardCopy® IV ASIC
  • Stratix IV GX Transceivers
  • Hard IP for PCI Express
  • Signal Integrity
  • HardCopy IV ASICs

Related Links

  • Stratix IV Device Overview
  • Start Designing with Stratix IV FPGAs
  • Literature and Design Resources
  • Quartus® II Development Software
  • End Markets and Applications
Rate This Page


  • Product Selector
    • Compare Devices (Beta)
  • High-End FPGAs
    • About Stratix Series
    • Stratix IV (E, GX, GT)
      • Overview
        • Architecture
        • Density
        • Performance
        • Power
      • Transceivers (GX and GT)
      • End Markets & Applications
      • Design Resources
      • Literature
      • Getting Started
    • Stratix III (L and E)
      • Overview
      • End Markets & Applications
      • Design Resources
      • Literature
      • Getting Started
    • Stratix II (and GX)
      • Stratix II
        • Overview
        • Design Utilities
        • Features
        • Literature
      • Stratix II GX
        • Overview
        • Design Utilities
        • Features
        • Literature
    • Stratix (and GX)
      • Stratix
        • Overview
        • Design Utilities
        • Features
        • Literature
      • Stratix GX
        • Overview
        • Design Utilities
        • Features
        • Literature
  • Midrange FPGAs
    • About Arria Series
    • Arria II GX
      • Overview
        • Architecture
        • Power
      • Transceivers
      • End Markets & Applications
      • Design Resources
      • Literature
      • Getting Started
    • Arria GX
      • Overview
        • Architecture
        • Software
      • Transceivers
      • Applications
      • Design Resources
      • Literature
      • Getting Started
  • Low-Cost FPGAs
    • About Cyclone Series
    • Cyclone IV (E and GX)
      • Overview
        • Architecture
        • Power
      • Transceivers
      • End Markets & Applications
      • Design Resources
      • Literature
      • Getting Started
    • Cyclone III (and LS)
      • Overview
        • Architecture
        • Power
        • Security
      • End Markets & Applications
      • Design Resources
      • Literature
      • Getting Started
    • Cyclone II
      • Overview
      • Design Utilities
      • Features
      • Literature
    • Cyclone
      • Overview
      • Design Utilities
      • Features
      • Literature
  • CPLDs
    • About MAX Series
    • MAX II (and G, Z)
      • Overview
        • Architecture
        • Power
        • Unique Features
      • Applications
      • Design Resources
      • Literature
      • Getting Started
    • MAX 3000A
      • Overview
      • Design Utilities
      • Features
      • Literature
  • ASICs
    • About HardCopy Series
    • HardCopy IV (E and GX)
      • Overview
        • Power
        • SEU
        • Performance
      • Transceivers
      • End Markets & Applications
      • Literature
      • Getting Started
    • HardCopy III
      • Overview
        • Architecture
        • Power
        • SEU
        • Performance
      • End Markets & Applications
      • Literature
      • Getting Started
    • HardCopy II
      • Overview
        • Power
        • SEU
        • Performance
      • End Markets & Applications
      • Literature
      • Getting Started
  • Device-Specific Offerings
    • RoHS Compliant
      • Packaging Literature
    • Extended Temperature
    • Enhanced Temperature
    • Military Temperature
  • Configuration Devices
    • Enhanced Configuration
      • Overview
      • Design Utilities
      • Features
      • Literature
    • Serial Configuration
      • Overview
      • Design Utilities
      • Features
      • Literature
  • Mature Products
    • Product Listing
    Please give us feedback
    Products | End Markets | Technology | Training | Support | About Altera | Buy Online
    Jobs | Investor Relations | Contact Us | Site Map | Privacy | Legal Notice
    Copyright © 1995-2010 Altera Corporation. All Rights Reserved.
    Altera Forum
    Altera
    Forum
    Twitter
    Twitter
    RSS
    RSS
    Facebook
    Facebook
    Flickr
    Flickr
    YouTube
    YouTube
    Email Updates
    Email
    Updates