Stratix GX Devices: Base-Station Transceiver Card Application
Having gone through a few generations by now, mobile communication is becoming the primary mode of communication in developed countries. Typically based on 2.5G technologies (enhanced second-generation mobile technologies), most of these countries now have data services available that will lead to significant changes in the way people exchange information for business and personal use.
The increasing popularity of data services requires greater performance and bandwidth. In order to support these new requirements, the mobile communication system must evolve to a third-generation (3G) system with a higher data rate-up to 2 megabits per second (Mbps)-while maximizing bandwidth. One of the key techniques to expand bandwidth is to use diversity schemes, which have been incorporated in most 3G specifications. However, each additional antenna added to a sector requires an additional transceiver, which can be a significant cost increase that may deter operators from leveraging 3G technology. Two key techniques that can lower the cost of the transceiver are digital intermediate frequency (IF) and the digital predistortion linearizer.
Figure 1 shows a generic architecture of a 3G base-station. The transceiver card contains digital IF functionality, the first IF implementation in the digital domain, and a digital predistortion linearizer that performs pre-emphasis to compensate for the non-linear power amplifier. The transceiver card typically links with the channel card over a backplane. Given the high-speed nature of the link, the long trace length that runs across a typically noisy backplane, and the multiple connectors through which the signals must travel, clock-data recovery (CDR)-based implementations are typically used.
Figure 1: 3G Base-Station Architecture
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Notes to Figure 1:
- ATM = Asynchronous transfer mode
- IP = Intellectual property
Using Stratix GX Devices in the Transceiver Card
Figures 2 and 3 show the functional block diagram of a single-carrier transceiver card. In the transmit direction (Figure 2), the transceiver receives data via high-speed serial signals (serial RapidIO™ or proprietary interface) over the backplane from one or more channel cards. It first performs data formatting and gain control followed by baseband filtering and interpolation functions. The signals are then pre-equalized to compensate for non-linearity of the power amplifier (PA), which comes at the end of the radio frequency (RF) transmit chain. To adapt to the change in the response of the PA (due to temperature change or aging), the output of the PA is continuously monitored, and the look-up table (LUT) values are dynamically updated to compensate for variation in the PA's behavior. The adaptive estimation algorithm calculates the mean square error between the input and output and calculates the new weights. A recursive algorithm to calculate the new LUT values can be implemented on the Altera® Nios® embedded processor. With the custom instruction capability of the Nios processor, your design can easily meet the performance requirements for this application. After the complex multiplication, the signals are upconverted using the carrier signals generated by the numerically controlled oscillator (NCO). The I and Q signals are combined and passed through the D/A converter for further processing in the analog domain.
On the receiver side, digital IF techniques are used to sample the IF signal and perform demodulation and channelization in the digital domain. Using under-sampling techniques, high-frequency IF signals (typically over 100 Mhz) can be quantized. The wide-band IF signal is translated to a complex baseband signal by quadrature multiplication. An NCO generates the quadrature signals for the multipliers. The complex baseband signal is low-pass filtered to prevent aliasing due to decimation. The resulting signals are sent to channel card(s) using high-speed serial links.
Figure 2: Transceiver Card Implementation: Transmit Side
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Notes to Figure 2:
- FFT = Fast Fourier transform
- I/Q = In-phase quadrature
- RRC = Root raised cosine
Figure 3: Transceiver Card Implementation: Receive Side
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There are two key advantages to implementing transceiver card functionality using Stratix GX devices: flexibility and high levels of integration.
Using Stratix GX devices and DSP development solutions, customers can rapidly implement custom design and achieve the system performance (e.g., adjacent channel power ratio specification) that is optimal for their system. Also, the required multi-mode capability and the number of carriers needed for their product can be implemented.
With Stratix GX devices, you can integrate digital IF, the digital predistortion linearizer, and backplane transceiver links, leading to cost savings and board simplification.
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