Literature: Stratix Device Handbook
The Stratix® Device Handbook is comprised of two volumes. Volume 1 is the Stratix FPGA family data sheet; Volume 2 contains detailed information on how to use Stratix features. To view all two volumes, click the link below.
Get more information on Stratix Pin-Outs.
Check the Knowledge Database for Known Issues with the Stratix Handbook.
Volume 1 (ver 3.4, Jan 2006, 3 MB)
Section I.
Stratix Device Family Data Sheet (3 MB)
- Chapter 1. Introduction (ver 3.2, Jul 2005, 111 KB)
- Chapter 2. Stratix Architecture (ver 3.3, Jul 2005, 1 MB)
- Chapter 3. Configuration & Testing (ver 1.3, Jul 2005, 181 KB)
- Chapter 4. DC & Switching Characteristics (ver 3.4, Jan 2006, 2 MB)
- Chapter 5. Reference & Ordering Information (ver 2.1, Sep 2004, 59 KB)
Volume 2 (ver 3.5, Jun 2006, 6 MB)
Section I.
Clock Management (693 KB)
Section II.
Memory (525 KB)
Section III.
I/O Standards (1 MB)
Section IV.
Digital Signal Processing (DSP) (952 KB)
Section V.
IP & Design Considerations (659 KB)
Section VI.
Configuration & Remote System Upgrades (1 MB)
Section VII.
PCB Layout Guidelines (625 KB)
Related Documentation
Data Sheets
- Stratix GX FPGA Family Data Sheet (ver 2.2, Dec 2004, 2 MB)
- Stratix Series Device Thermal Resistance (ver 5.0, Oct 2008, 212 KB)
- Altera Device Package Information Data Sheet (ver 15.2, Sep 2008, 3 MB)
- Stratix EP1S25 DSP Development Board Data Sheet (ver 1.6, Dec 2004, 663 KB)
- Stratix PCI Development Board Data Sheet (ver 2.0, Sep 2003, 2 MB)
User Guides
- Double Data Rate I/O Megafunction User Guide (ALTDDIO_IN, ALTDDIO_OUT, and ALTDDIO_BIDIR) (ver 4.2, Jun 2007, 4 MB)
- Single- and Dual-Clock FIFO Megafunction User Guide (ver 4.0, May 2007, 960 KB)
- PowerPlay Early Power Estimator User Guide for Stratix, Stratix GX & Cyclone FPGAs (ver 2.0, Oct 2005, 649 KB)
- First-In-First-Out Partitioner Megafunction User Guide (FIFO Partitioner) (ver 1.2, Aug 2005, 306 KB)
- PCI High-Speed Development Kit, Stratix Professional Edition Getting Started User Guide (ver 1.0.0, Sep 2003, 2 MB)
Manuals
Application Notes
- AN 326: Interfacing QDRII+ & QDRII with Stratix II, Stratix II GX, Stratix, & Stratix GX Devices (ver 5.1, May 2008, 2 MB)
- AN 357: Error Detection & Recovery Using CRC in Altera FPGA Devices (ver 1.4, Jul 2008, 371 KB)
- AN 311: ASIC-to-FPGA Design Methodology and Guidelines (ver 3.0, Jun 2008, 386 KB)
- AN 114: Designing with High-Density BGA Packages for Altera Devices (ver 5.1, Dec 2007, 574 KB)
- AN 344: ASI Demonstration (ver 2.0, Oct 2006, 145 KB)
- AN 282: Implementing PLL Reconfiguration in Stratix & Stratix GX Devices (ver 2.0, Dec 2005, 511 KB)
- AN 342: Interfacing DDR SDRAM with Stratix & Stratix GX Devices (ver 2.0, Dec 2005, 428 KB)
- AN 325: Interfacing RLDRAM II with Stratix II, Stratix & Stratix GX Devices (ver 3.1, Nov 2005, 2 MB)
- AN 360: Updating Simulation Models for the POS-PHY Level 4 MegaCore Function (ver 1.1, Dec 2004, 63 KB)
- AN 306: Implementing Multipliers in FPGA Devices (ver 3.0, Jul 2004, 733 KB)
- AN 349: QDR SRAM Controller Reference Design for Stratix & Stratix GX Devices (ver 1.0, May 2004, 280 KB)
- AN 329: ZBT SRAM Controller Reference Design for Stratix & Stratix GX Devices (ver 1.0, Mar 2004, 165 KB)
- AN 315: Guidelines for Designing High-Speed FPGA PCBs (ver 1.1, Feb 2004, 2 MB)
- AN 313: Implementing Clock Switchover in Stratix & Stratix GX Devices (ver 1.0, Jan 2004, 273 KB)
- AN 247: Stratix GX to Mercury Interoperability (ver 1.2, Jan 2004, 82 KB)
- AN 336: Using External Series and Parallel Termination with Stratix and Stratix GX Devices (ver 1.0, Nov 2003, 1 MB)
- AN 210: Converting Memory from Asynchronous to Synchronous for Stratix & Stratix GX Designs (ver 2.0, Nov 2002, 143 KB)
- AN 207: TriMatrix Memory Selection Using the Quartus II Software (ver 2.1, Nov 2002, 324 KB)
- AN 224: High-Speed Board Layout Guidelines (ver 1.0, Nov 2002, 896 KB)
White Papers
- FPGA Performance Benchmarking Methodology (ver 1.6, Aug 2007, 246 KB)
- Hot-Socketing & Power-Sequencing Feature & Testing for Altera Devices (ver 1.1, May 2006, 319 KB)
- Input Signal Edge Rate Guidance (ver 1.0, Jun 2005, 63 KB)
- Using Parity to Detect Memory Errors in Stratix Devices (ver 1.2, Feb 2005, 97 KB)
- Stratix vs. Virtex-II Pro FPGA Performance Analysis (ver 1.1, Nov 2004, 146 KB)
- Using Stratix GX Devices for SONET/SDH Backplanes (ver 1.1, May 2004, 193 KB)
- Improving Pin-to-Pin Timing in Stratix & Stratix GX (ver 1.0, Apr 2004, 170 KB)
- The Need for Dynamic Phase Alignment in High-Speed FPGAs (ver 1.1, Feb 2004, 71 KB)
- Altera Hot-Socketing & Power-Sequencing Advantages (ver 1.2, Feb 2004, 79 KB)
- MorphIO: An I/O Reconfiguration Solution for Altera Devices (ver 1.0, May 2003, 46 KB)
- An Analytical Review of FPGA Logic Efficiency in Stratix, Virtex-II & Virtex-II Pro Devices (ver 1.1, May 2003, 117 KB)
Selector Guides
Errata Sheets
Technical Briefs
Product Overview
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Literature
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