External Memory Device Interfaces in Stratix Devices
Altera® Stratix® devices address increasing memory bandwidth requirements in two ways: by providing customers with abundant on-chip memory resources with the TriMatrix memory structure and through additional off-chip data storage with support for external memory interfaces. You can connect Stratix devices to a wide range of the latest memory devices from leading vendors such as Micron Technology, Integrated Device Technology, and Samsung Electronics. Using a comprehensive, industry-leading solution, flexible Stratix device features, and customizable intellectual property (IP), you can integrate high-density memory devices into complex system designs without degrading data access performance or increasing development time.
The rapid deployment of next-generation system architectures is accompanied by an increasing demand for total system memory bandwidth, which pushes I/O bandwidth and processing power requirements to new levels. New memory-intensive applications have prompted memory device makers to develop larger, more feature-rich devices that are capable of high-speed data transfer. As each designer's application requires specialized capabilities and features, memory devices have proliferated, each focusing on a specific aspect (such as speed, cost, or size).
Stratix devices support a wide variety of advanced memory interfaces, as summarized in Table 1. You can find more information about these memory device types on the SRAM and DRAM web pages.
| Table 1. External Memory Interface Support in Stratix devices |
| External Memory Device |
Maximum Data Transfer Rate |
Memory Clock Speed |
| Single Data Rate (SDR) SDRAM |
200 Mbps |
200 MHz |
| Double Data Rate (DDR) SDRAM |
400 Mbps |
200 MHz |
| DDR FCRAM |
400 Mbps |
200 MHz |
| Zero Bus Turnaround (ZBT) SRAM |
200 Mbps |
200 MHz |
| QDR SRAM |
668 Mbps |
167 MHz |
| QDRII SRAM |
800 Mbps |
200 MHz |
Optimized for Performance
Stratix devices are designed to reliably transfer data to and from external memory devices. Stratix devices include dedicated I/O features that ensure that all timing requirements are met and that performance is maximized. These features are outlined in Table 2.
| Table 2. Stratix Device I/O Features |
| Feature |
Benefit |
| Multi-Register I/O Elements (IOEs) |
- Ensure input, output, and output enable (OE) registers maximize performance
- Simplify implementation of multi-data rate I/O functions
|
| Programmable Input Delays |
- Meet input timing requirements of DDR SDRAM devices
|
| Programmable ZBT Delay |
- Eliminates bus turnaround contention
|
| Dedicated Data Strobe (DQS) Circuitry |
- Synthesizes high-speed clock and DQS signals
- Minimizes clock skew between DQS and data DQ signals
- Shifts DQS signal for optimized clock and data alignment
|
| Positive Edge Alignment Circuitry |
- Ensures positive-edge clock interface with the logic array
|
The Stratix input/output element (IOE) is shown in Figure 1.
Figure 1. Stratix Device I/O Circuitry
In addition to the I/O interface-specific features, Stratix devices maximize memory interface performance using general-purpose programmable logic features as outlined in Table 3.
| Table 3. Stratix Device Features |
| Feature |
Benefit |
| Phase-Locked Loops (PLLs) |
- Synthesize high-speed clock and data strobe signals
- Perform precise phase shifting for clock and data alignment
|
| On-Chip Termination |
- Eliminates signal reflection
- Improves signal integrity
- Simplifies overall PCB design
|
| Advanced Clock Networks |
- Provide global and localized clock resources
|
| I/O Banks |
- Support memory device-compatible I/O standards
- HSTL Class I & II
- SSTL-2 Class II
|
IP Optimized for Stratix Devices
Altera offers fully customizable IP megafunction controller cores developed and tested by Altera and Altera Megafunction Partners Program (AMPPSM) partners, available at the IP MegaStoreTM website. Altera also offers several memory controller design examples for users designing their own custom memory interfaces. These megafunctions allow you to quickly and easily incorporate the latest semiconductor memory technologies into your Stratix designs using an intuitive GUI from within the Quartus® II software.
Altera memory controller example designs:
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