Stratix III Device Family Architecture
The core fabric of Stratix® III FPGAs is built from innovative logic units known as adaptive logic modules (ALMs), see Figure 1. The ALMs are routed with the MultiTrack interconnect architecture, enabling Stratix III devices to implement high-speed logic, arithmetic, and register functions.
Adaptive Logic Module
Each ALM has 8 inputs with a fracturable logic structure capable of:
- A full 6-input look-up table (LUT) or select 7-input LUT
- Two independent outputs of multiple combinations of smaller LUT sizes for efficient logic packing
- Implementing complex logic-arithmetic functions without additional resources
Figure 1. Stratix III Device ALM
Table 1 details the features and advantages of Stratix III device ALMs.
| Table 1. Stratix III Device ALM Features and Advantages |
| Available Resources per ALM |
Advantages |
| 8-Input Fracturable LUT |
- Can implement any 6-input logic function and certain 7-input functions and be fractured into independent smaller LUTs, such as two independent 4-input LUTs
- Quartus® II software design suite integrates this fracturability and optimizes it for performance, efficiency, power, and area (more logic capacity and less wasted logic)
|
| Two Embedded Adders |
- Allows for two two-bit addition, or two three-bit addition without any additional resources
- Operands can be generated from the same ALM and do not require any additional logic
|
| Two Registers |
- Optimal register-to-logic ratio to ensure device is not register-limited
- Abundance in registers for register-rich applications or pipeline designs for performance
|
| Two Outputs |
- The inputs of a single ALM can be divided between the two output functions, allowing wide input functions to run fast and narrow input functions to efficiently use remaining resources
|
| MLAB |
- New for the Stratix III FPGA core is a second variation of the logic array block (LAB), known as the MLAB that can be used as a regular ALM or can be configured as simple dual port SRAM blocks
- Part of the TriMatrix memory technology, MLABs can be configured as a 64x10 or 32x20 simple dual port SRAM blocks. The MLABs have been optimized to implement filter delay lines, small FIFO buffers, and shift registers with maximum performance of 600-MHz clock speeds
|
For more information, refer to the Logic Array Blocks & Adaptive Logic Modules chapter in the Stratix III Device Handbook.
The MultiTrack Interconnect
Stratix III FPGAs also leverage the MultiTrack interconnect technology. This technology consists of continuous, performance-optimized routing lines of different lengths used for communication within and between distinct design blocks.
MultiTrack interconnect technology shown in Figure 2 is used in Altera's Stratix FPGA series to:
- Provide the industry's best connectivity with up to five times the logic in a single hop, compared to the competition
- Provide more accessibility to any surrounding LAB with much fewer connections, thus improving performance and reducing power
- Avoid area congestion to provide better logic packing
Figure 2. Stratix FPGA Series MultiTrack Interconnect Connectivity
For more information, refer to the MultiTrack Interconnect chapter in the Stratix III Device Handbook.
Advantages of Stratix III Architecture
The fracturable LUT, two full adders, two registers, and additional logic enhancements enable the ALM to be partitioned into two independent LUTs for maximizing efficiency thus making Stratix III the fastest and biggest FPGAs ever—with no wasted logic. Stratix III devices are:
- 35 percent faster than previous generation Stratix II FPGAs
- 25 percent faster and can effectively pack 80 percent more logic compared to the nearest competing logic cell. Thereby cutting costs by packing more logic in a smaller, less expensive device
- Fully integrated with Quartus II software to optimally utilize the 8-input fracturable LUT in the ALM and the MultiTrack routing interconnect architecture, and improve productivity by easily and reliably meeting timing closure
Table 2 provides links to additional information about Stratix III FPGAs.
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