Arria II GX FPGA Development Kit

from Altera Corporation

The Altera^® Arria^® II GX FPGA Development Kit delivers a complete system-level design environment that includes both the hardware and software needed to immediately begin developing FPGA designs. With this PCI-SIG-compliant board and a one-year license for Quartus^® II design software, you can:

Develop and test PCI Express 1.0 (up to x8 lane) designs
Develop and test memory subsystems consisting of DDR2 and/or DDR3 memory
Develop and test designs based on other Arria II GX supported protocol interfaces such as Gigabit Ethernet, SDI, CPRI, OBSAI, SAS/SATA, and Serial RapidIO^®. Many of these are supported by taking advantage of this board's modular capability through the high-speed mezzanine card (HSMC) connectors and over 20 different HSMC connectors available through Altera partners.

Arria II GX FPGAs also support other protocols.

Ordering Information
HSMC Interface
Development Kit Contents
Documentation
Related Links

Ordering Information

Ordering Code	Price	Ordering Information
Table 1. Arria II GX FPGA Development Kit Ordering Code and Pricing Information
DK-DEV-2AGX125N	$1,495	Buy online via Altera's eStore or contact your local Altera distributor to place your order.

Other HSMC-compatible daughtercards, adapters, or cables are also available.

HSMC Interface

Altera developed the specification for the HSMC, which is based on the Samtec mechanical connector, to define and standardize the interface between optional daughtercards and host boards. This specification outlines both the electrical and mechanical properties of the interface between daughtercard and host. You can also create your own HSMC interface-compatible daughtercards.

Download a copy of the HSMC specification (PDF)

Development Kit Contents

The Arria II GX FPGA Development Kit is RoHS compliant and features the following:

Arria II GX EP2AGX125EF35 FPGA in the 1152-pin fine pitch BGA package
- 124,100 logic elements (LEs)
- 49,640 adaptive logic modules (ALMs)
- 8,121 Kb on-chip memory
- 12 high-speed transceivers
- 6 phase-locked loops (PLLs)
- 576 18x18 multipliers
- 0.9V core power
Max^® II EPM2210F256 CPLD in the 256-pin Fine Pitch BGA Package
- 2.5V core power
On-board ports
- One HSMC expansion port
- One gigabit Ethernet port
On-board memory
- 128-MB 16-bit DDR3 device
- 1-GB 64-bit DDR2 SODIMM
- 2-MB SSRAM
- 64-MB flash
FPGA configuration circuitry
- MAX II CPLD and flash fast passive parallel configuration
- On-board USB-Blaster™ circuitry using the Quartus II Programmer
On-board clocking circuitry
- Four on-board oscillators
  - 100 MHz
  - Programmable oscillator, default frequency 125 MHz
  - Programmable oscillator, default frequency 100 MHz
  - 155.52 MHz
- SMA connectors for external LVPECL clock input
- SMA connector for clock output
General user I/O
- LEDs/displays
  - Four user LEDs
  - Two-line character LCD display
  - One configuration-done LED
  - One HSMC interface transmit/receive LED (Tx/Rx)
  - Three PCI Express LEDs
  - Five Ethernet LEDs
Push-buttons
- One user reset (CPU reset)
- One MAX II CPLD reset
- One load image (program FPGA from flash)
- One image select (select image to load from flash)
- Two general user push-buttons
DIP switches
- Four user DIP switches
- Eight MAX II device control DIP switches
Power supply
- 14-V to 20-V DC input
- PCI Express edge connector power
- On-board power measurement circuitry
Mechanical
- PCI Express full-length standard-height (8.48” x 4.376”)
- PCI Express chassis or bench-top operation
Arria II GX FPGA Development Kit CD-ROM
- Design examples
  - Board Update Portal, featuring the Nios^® II processor web server and remote system update
  - Board test system
- Complete documentation (see Table 2)
Altera's complete Design Suite DVD
- Quartus II Software Development Kit Edition, includes support for Arria II GX FPGAs
  - Includes one-year license
- Nios II Embedded Design Suite
- MegaCore^® IP Library includes PCI Express, Triple Speed Ethernet, SDI, and DDR3 High-Performance Controller IP cores
  - IP evaluation available through OpenCore Plus
Power adaptor and cables

Figure 1. Arria II GX FPGA Development Board

Figure 1. Arria II GX Dev Kit

Available Documentation

*Table 2. Documents Available for the Arria II GX FPGA Development Kit*
Document	Description	Format	Language
User Guide	Information about setting up the Arria II GX FPGA development board and using the included software	PDF	English
Reference Manual	Detailed information about board components and interfaces	PDF	English
Kit Installation (via FTP)	Full installation of all files including reference manual, user guide, quick-start guide, demos and tutorials, BOM, layout, PCB, schematics, Board Update Portal example file, Board Test System example file, etc.	PDF and Microsoft Excel	English

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