DSP Development Kit, Cyclone III Edition

from Altera Corporation

The DSP Development Kit, Cyclone^® III Edition is RoHS compliant and delivers a complete digital signal processing (DSP) development environment. The kit facilitates the entire design process from design conception through hardware implementation. The DSP Development Kit, Cyclone III Edition includes the Cyclone III development board, the data conversion high-speed mezzanine card (HSMC), the DSP Builder development tool, Quartus^® II development software, MATLAB/Simulink evaluation software, evaluation intellectual property (IP) cores, design examples, power supplies, cables, and documentation.

• Ordering Information
• HSMC Interface
• Development Kit Contents
• Available Documentation
• Errata
• Related Links

Ordering Information

Table 1 provides the ordering code and pricing information for the DSP Development Kit, Cyclone III Edition.

Table 1. DSP Development Kit, Cyclone III Edition Ordering Code and Pricing Information
Ordering Code	Price	Ordering Information
DK-DSP-3C120N	$1,595	In North America, call 1-888-800-0631. For international sales, contact your local distributor.

Table 2 provides information for finding HSMC-based daughtercards, adapters, and cables.

Table 2. Optional  HSMC Interface-Compatible Daughtercards, Adapters, or Cables
Product Name	Type	Vendor	Host Board	Price/Availability
More than 15 different choices	HSMC compatible accessories	Various	Cyclone III FPGA-based boards	As low as $50

Development Kit Contents

The DSP Development Kit, Cyclone III Edition features:

• Cyclone III Development Board 
  • Featured device
    • Cyclone III EP3C120F780 FPGA
  • Display and general user input/output
    • 128 x 64 graphics LCD
    • 2-line x 16-character LCD
    • Buttons, dip-switches, LEDs, 7-segment display, speaker header
  • Memory
    • 256 Mbytes of dual-channel DDR2 SDRAM with ECC
    • 8 Mbytes of synchronous SRAM
    • 64 Mbytes of flash
  • Components and interfaces
    • 10/100/1000 Ethernet (RGMII)
    • USB 2.0 (Type B)
    • Two HSMC connectors
  • Power and data converters
    • LT1963AES8: 2.5 to 1.5-A, low noise, fast transient response LDO regulators
    • LT1963AES8: 1.5-A, low noise, fast transient response LDO regulators
    • LT3481EDD: 36-V, 2-A, 2.8-MHz step-down switching regulator with 50-µA quiescent current
    • LT1761ES5-SD: 100-mA, low noise, LDO micropower regulators in SOT-23
    • LTC3418EUHF: 8-A, 4-MHz, monolithic synchronous step-down regulator
    • LTM4601EV: 12-A DC/DC µModule
    • LT1931AES5: 1.2/2.2-MHz inverting DC/DC converters in ThinSOT
    • LTC2402CMS: 1/2-Channel, 24-bit µPower no latency delta-sigma ADC in MSOP-10
• Data conversion HSMC 
  • Dual 14-bit, 150-MSPS A/D converter 
  • Dual 14-bit, 250-MSPS D/A converter 
  • Audio in/out/mic
• Cyclone III FPGA Development Kit, CD-ROM
  • Design examples for the Cyclone III FPGA development board
  • Complete documentation
    • User guide
    • Reference manual
    • Board schematic and layout
    • Bill of materials
    • Product and partner information
• MATLAB/Simulink evaluation software
• Altera^® Complete Design Suite DVD
  • Quartus II design software
    • Subscription Edition (optional feature, available for purchase)
    • Web Edition (no charge, Windows only)
  • ModelSim^®-Altera software 
    • Altera Edition (optional feature, available for purchase)
    • Web Edition (no charge, Windows only)
  • MegaCore^® IP Library including Nios^® II processor —OpenCore Plus evaluation
  • Nios II Embedded Design Suite, Evaluation Edition (free)
  • DSP Builder
  • Video demos of Quartus II software and the Nios II processor
  • System reference designs and labs
    • DSP Builder filtering design
    • Nios II processor reference designs

HSMC Interface

Altera developed the specification for the HSMC, which is based on the Samtec mechanical connector, to define and standardize the interface between optional daughtercards and host boards. This specification outlines both the electrical and mechanical properties of the interface between daughtercard and host. You can also create your own HSMC interface compatible daughtercards.

• Download a copy of the HSMC specification (PDF)

Figure 1 shows the Cyclone III development board.

Figure 1. Cyclone III FPGA Development Board

Figure 2 shows the data conversion HSMC.

Figure 2. Cyclone III Data Conversion HSMC

Available Documentation

Table 2. Documents Available for the DSP Development Kit, Cyclone III Edition
Document	File Format	Download	Language
User Guide	Adobe PDF	Via FTP	English
Reference Manual	Adobe PDF
Board Assembly	Adobe PDF
Board Mechanicals	Adobe PDF
Board Schematic	Adobe PDF
Bill of Materials	Microsoft Excel

Errata

There are two known errata on this development kit. The problems are with the on-board power monitor circuitry and a reset issue with the embedded USB-Blaster™ circuitry. Both bugs can be fixed by downloading an updated MAX II CPLD programming file.

To see if your board needs the updated programming file press and hold the CPU_RESET pushbutton.  If the Power Display does not show “1337” or higher or it shows nothing at all, then your board should be upgraded to the new programming file. Click here to download a zip file containing the files need to upgrade your board.  Follow the instructions in the max2_upgrade_instructions.txt  text file.

Related Links

• Other Cyclone III-based development kits
• AN 466: Design Guidelines for Cyclone III FPGAs (PDF)
• Quartus II design software
• Literature for low-cost Cyclone III FPGAs
• Nios II 32-bit embedded processor solutions
• Digital signal processing (DSP) in Cyclone III FPGAs
• Power Management Center for Altera devices