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Nios II Embedded Evaluation Kit, Cyclone III Edition

Home > Products > Development Kits/Cables > Nios II Embedded Evaluation Kit, Cyclone III Edition

from Altera

Nios II Embedded Evaluation Kit, Cyclone III Edition

Order this evaluation kit now for just $449.00!

  • Ordering information
  • Licensing
  • Example processor systems
  • Nios II System Architect Design Tutorial 
  • Design examples and demos
  • Evaluation kit contents
  • Included documentation
  • Update instructions

The Nios® II Embedded Evaluation Kit, Cyclone® III Edition makes evaluating Altera’s embedded solutions easier than ever. You can evaluate a dozen different processor systems targeting the low-cost, low-power Cyclone III FPGA by simply using the LCD color touch panel to scroll through and load your demo of choice.

These processor systems showcase the unique benefits of FPGA-based processors such as reducing bill of material (BOM) costs by integrating powerful graphics engines within the FPGA, reducing operating costs by upgrading your system over the Internet, or increasing system performance while reducing power using the C-to-Hardware (C2H) acceleration compiler.

The Nios II Embedded Evaluation kit, Cyclone III Edition comes with a comprehensive suite for software development—the Nios II Embedded Design Suite (EDS)—as well as sample Nios II processor systems that include full source code.

Figure 1. Nios II Embedded Evaluation Kit, Cyclone III Edition

Nios II Embedded Evaluation Kit, Cyclone III Edition (Back View)
Choose Thumbnail to View Larger
Nios II Embedded Evaluation Kit, Cyclone III Edition (Angled View)
Nios II Embedded Evaluation Kit, Cyclone III Edition (Front View)

Ordering Information

Tables 1 and 2 show the ordering code and pricing information for the Nios II Embedded Evaluation Kit, Cyclone III Edition and the kit upgrade license.

Table 1. Nios II Embedded Evaluation Kit, Cyclone III Edition Ordering Code and Pricing Information
Ordering Code Price Ordering Information
DK-N2EVAL-3C25N $449
Purchase online via Altera's eStore or contact your local Altera® distributor to place your order.

Licensing

Software

The Nios II Embedded Evaluation Kit, Cyclone III Edition includes Quartus® II Web Edition Software and the Nios II Embedded Design Suite.

Intellectual Property

Intellectual property (IP) licenses are sold separately. You may still install and start designing with any Altera IP core via the OpenCore Plus (PDF) simulation and hardware evaluation feature.

Table 2. Embedded IP Suite
Ordering Code Price Ordering Information
IPS-EMBEDDED $995

This IP suite includes all the IP you need to ship a standard Nios II processor design.  Upgrade your kit with this perpetual use, royalty-free license bundle for embedded design.

  • Nios II Processor
  • Triple-Speed Ethernet MegaCore® Function
  • DDR/DDR2 High-Performance Memory Controllers
  • NicheStack TCP/IP Network Stack - Nios II Edition

Example Processor Systems

Table 3 lists additional downloads for the Nios II Embedded Evaluation Kit, Cyclone III Edition.

Table 3. Additional Downloads for the Nios II  Embedded Evaluation Kit, Cyclone III Edition
Download Description
Nios II 3C25 Microprocessor System with LCD Controller data sheet (PDF)

Full system description of the Nios II EP3C25 Microprocessor System with LCD Controller.

Nios II Standard Processor System

This Nios II processor system is the default hardware image that boots up on your Nios II Embedded Evaluation Kit. The system has been put together using SOPC Builder and can be a starting point for your own Nios II processor system design.

System Architect Tutorial

Table 4 lists the downloads for the Nios System Architect Design Tutorial

Table 4. Downloads for the Nios II System Architect Design Tutorial
Download Description
Nios II System Architect Design Tutorial

This tutorial teaches you how to use SOPC Builder, the Quartus II software, and the Nios II Embedded Design Suite (EDS) to implement a digital picture viewer targeted for the Nios II Embedded Evaluation Kit

Design Files

Design files for the Nios II System Architect Design Tutorial

Design Examples and Demos

The Nios II standard processor system is the default hardware image that boots up on your Nios II Embedded Evaluation Kit. The system has been put together using SOPC Builder and can be a starting point for your own Nios II processor system design.

The following design examples include the source code and design files. This is a great way to see examples of software drivers for various hardware peripherals on your board.

Table 5 lists the designs available for the Nios II Embedded Evaluation Kit, Cyclone III Edition.

Table 5. Designs Available for the Embedded Evaluation Kit, Cyclone III Edition
Design Description
Application Selector Utility  Select and load designs from SD card
Mandelbrot Hardware Acceleration Hardware acceleration example with the Nios II C2H acceleration compiler
Picture Viewer View photos stored on the SD card
Web Server/Remote FPGA Configuration Control aspects of the board through a web page including remote configuration of the FPGA

You can load ready-to-run SD card demos using the application selector utility, and are provided for demonstration and evaluation to showcase Altera’s embedded partners for operating systems, middleware, IP, and software tools. These demos are provided in binary format only. Full Quartus II development software projects, source code, IP licensing, etc. can be obtained by contacting the partner listed.

Table 6 lists the ready-to-run SD card demos designs available for the Nios II Embedded Evaluation Kit, Cyclone III Edition.

Table 6. Ready-to-run SD Card Demos
Design Description
SLS uCLinux Demo (1)  Run the uCLinux operating system with a BSP available from SLS
Planetweb SpectraWorks Digital Photo Frame (1) Digital Photo Frame application showcasing SpectraWorks from Planetweb
Planetweb SpectraWorks GUI Feature Demo 

SpectraWorks GUI builder demo from Planetweb

Planetweb Menu Demo (1)  SpectraWorks GUI menu demo from Planetweb
IMAGEM Taquin Game  (1) Graphics and video demo from IMAGEM Technology
IMAGEM aPhone  (1)  Mobile phone graphics and video demo from IMAGEM Technology
IMAGEM Avionics  (1)  Avionic display demo from IMAGEM Technology
IMAGEM Instrumentation (1)  Instrumentation display demo from IMAGEM Technology
TES D/AVE Graphics Accelerator Demo  (1) Graphics accelerator demo from TES Electronic Solutions
Altia Red Touch Screen HMI for D/AVE  (1) Advanced touch-screen human-machine interface (HMI) application created for the TES D/AVE engine
Altia Blue Touch Screen HMI for D/AVE  (1)  Advanced touch-screen HMI application created for the TES D/AVE engine
Micriµm µC/GUI Demo  (1)  Graphics software module demo from Micrium
Micriµm Products Demo (1)  Demo showcasing Micrium product portfolio
UNEEK Presenter Show presentations from the Nios II Evaluation Kit on a projector or monitor

Download update pack
Graphic Equalizer Visually control and manipulate audio input on the LCD touch panel

Download update pack   
UNEEK Picture Viewer Picture viewer design example
MP3 Player Touch-screen MP3 Player example
Video and Image Processing Suite Demo

Demo showing the Altera Video and Image Processing Suite

More Designs See additional designs available from Altera and software partners
Nios Wiki Download and share designs with the Nios II user community

Note:

  1. Design supported by Altera's software partner.

Get the latest ready-to-run SD card demos by downloading them from this site and adding them to the SD card that comes with the kit. You can also build your own ready-to-run SD card demos and share them via the Nios II Embedded Evaluation Kit Community Wiki.

Check the Nios II embedded processor design example page to see all available new designs and download them to your kit today.

Evaluation Kit Contents

The Nios II Evaluation Kit, Cyclone III Edition is composed of the Cyclone III FPGA Starter Kit and an LCD/VGA HSMC daughtercard and features:

  • Cyclone III Starter Board
    • Cyclone III EP3C25F324 FPGA
    • Configuration
      • Embedded USB-Blaster™ circuitry (includes an Altera EPM3128A CPLD) allowing download of FPGA configuration files via your USB port
    • Power and analog devices from Linear Technology
      • Switching power supply LTM4603EV-1
      • Switching and step-down regulators LTC3413, LT1959
    • Memory
      • 32 Mbytes of DDR SDRAM
      • 1 Mbyte of synchronous SRAM
      • 16 Mbytes of Intel P30/P33 flash
    • Clocking
      • 50-MHz, on-board oscillator
    • Switches and indicators
      • Six push buttons total, four user controlled
      • Seven LEDs total, four user controlled
  • LCD daughtercard
    • Color LCD touch-screen display
      • 800 x 480 resolution
    • 24-bit CD-quality audio CODEC with line-in, line-out, and microphone-in jacks
    • 10/100 Ethernet physical layer/media access control (PHY/MAC)
    • Connectors
      • VGA output
      • Composite TV-in
      • Audio-out, audio-in, and microphone-in
      • SD card
      • Serial connector (RS-232 DB9 port)
      • PS/2
      • Ethernet connector (RJ-45)
  • Nios II Evaluation Kit CD-ROM
    • Example applications
      • Application selector
      • Picture viewer
      • Mandelbrot acceleration with the Nios II C2H acceleration compiler
      • Web server/remote FPGA configuration
    • Hardware tutorials
      • Create an FPGA design in one hour
      • Build a 32-bit soft processor system inside an FPGA
    • Software tutorials
      • My First Software Application
    • Complete documentation
      • Quick start guide
      • User guide
      • Reference manual
      • Board schematic, layout, and bill of materials
      • Product and partner information
  • Cables and accessories
    • 128-Mbyte secure digital card and USB-to-secure digital card adapter
    • USB cable
    • 9-V power supply
    • International power cords
    • Ethernet (RJ-45) cable (7 ft.)
    • Ethernet crossover adapter
  • Altera Complete Design Suite DVD (free):
    • Quartus II Web Edition (FPGA design software)
    • ModelSim®-Altera Web Edition (FPGA simulation software from ModelSim)
    • Nios II Embedded Design Suite (32-bit microprocessor software)
    • MicroC/OS-II real-time operating system evaluation
    • Nios II C-to-Hardware acceleration compiler evaluation
    • NicheStack TCP/IP Network Stack - Nios II Edition evaluation
    • SD/MMC SPI IP Core evaluation licensing available through El Camino
    • MegaCore IP Library (library of intellectual property cores)

Documentation

Table 7 lists the documents available for the Nios II Embedded Evaluation Kit, Cyclone III Edition.

Table 7. Documents Available for the Nios II Embedded Evaluation Kit, Cyclone III Edition
Document File Format Language
User Guide PDF English
Reference Manual ZIP English
Quick Start Guide PDF English
Hardware Tutorial PDF English
Software Tutorial PDF English
Board Layout ZIP English
Board Schematic ZIP English
Board Bill of Materials ZIP English

Update Instructions

Includes new design examples listed below and secure digital (SD) card demos. See below for step-by-step update instructions.

  Download the Nios II Embedded Evaluation Kit v8.0 Update

The Nios II Embedded Evaluation Kit v8.0 update includes new design examples, demos, and documentation. Follow the steps below to update your Nios II Embedded Evaluation Kit.

  1. The update requires Quartus II  software and the Nios II EDS v8.0 or above. Download and install if you haven't already. 
  2. Download and install the Nios II Embedded Evaluation Kit v8.0 update pack.
  3. The new SD card demos will be located in your Quartus II v8.0 directory similar to this:
    \altera\80\kits\cycloneIII_3c25_niosII\factory_recovery\flash_contents

Loading SD Card Demos

To load all the SD card demos just copy the contents of the following directory to your SD card:
 \altera\80\kits\cycloneIII_3c25_niosII\factory_recovery\sdcard_contents

Updating the Application Selector Utility

The application selector utility has been updated  with a new look and now supports remote system update from Ethernet. To update your application selector utility, follow the directions in the Restoring the Original Flash Image chapter of the Nios II Embedded Evaluation Kit User Guide v8.0 (PDF). Use the design flies in the following directory:  \altera\80\kits\cycloneIII_3c25_niosII\factory_recovery\flash_contents

Related Links

  • Design examples
  • Training resources
  • Embedded user community
  • SD card interface by El Camino
  • Buy Cyclone III FPGAs online
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