Cyclone III FPGA Development Kit

from Altera

• Ordering information
• Cyclone^® III FPGA support for soft intellectual property (IP) processors
• High-speed mezzanine card (HSMC) interface
• Development kit contents
• Board picture
• Available documentation
• Errata
• Related links

Altera's Cyclone III FPGA Development Kit combines the largest density low-cost, low-power FPGA available with a robust set of memories and user interfaces. The kit dramatically reduces the design and verification portion of your project, whether it’s for automotive, consumer, wireless communications, video processing or another high-volume, cost-sensitive application.

The low-cost Cyclone III FPGA family—the industry’s first family of low-cost, 60-nm devices—offers an unprecedented combination of low power, high functionality, and low cost. Cyclone III devices are ideal to complement or replace ASSPs or ASICs.

If you are an experienced FPGA designer checking out the Cyclone III architecture, you'll love building systems leveraging the 50 percent (on average) faster performance Cyclone III FPGAs offer over the competition.

Ordering Information

Table 1. Cyclone III FPGA Development Kit Ordering Code and Pricing Information (1)
Ordering Code	Price	Ordering Information
DK-DEV-3C120N	$1,195	Buy online via Altera's eStore or contact your local Altera® distributor to place your order

Note:

1. You can purchase optional HSMC interface-compatible daughtercards, adapters, or cables to use with your development kit.

Cyclone III FPGAs and 8-, 16-, 32-Bit Soft IP Processors

Cyclone III FPGAs, when combined with embedded processor IP cores, are perfectly suited to function as embedded processors or microcontrollers. Check out the other Cyclone III FPGA-based kits, specifically bundled with and targeted for Nios^® II embedded processing applications and available now (other processor architecture kits are also available).

• Altera's Nios^® II 32-bit embedded processor
  • Reference design: Embedded Linux from Wind River for the Nios II Processor
• ARM^® Cortex^TM M1 32-bit embedded processor
• Freescale V1 ColdFire 32-bit embedded processor
• Other 8-bit and 16-bit soft IP embedded processors
• Other IP cores

HSMC Interface

Altera developed the specification for the HSMC, which is based on the Samtec mechanical connector, to define and standardize the interface between optional daughtercards and host boards. This specification outlines both the electrical and mechanical properties of the interface between daughtercard and host. You can also create your own HSMC interface-compatible daughtercards.

• Download a copy of the High Speed Mezzanine Card (HSMC) Specification (PDF)

Development Kit Contents

The Cyclone III FPGA Development Kit is restriction of hazardeous substances (RoHS)-compliant and features:

• Cyclone III development board (see Figure 1)
  • Cyclone III EP3C120F780 FPGA
  • Embedded USB-Blaster™ circuitry (includes an Altera MAX^® II CPLD) allowing download of FPGA configuration files via the flash device or the host computer
• Memory
  • 256 megabytes (MB) of dual-channel DDR2 SDRAM with error correction code (ECC)
  • 8 MB of synchronous SRAM
  • 64 MB of flash memory
• Communication ports
  • 10/100/1000 Ethernet
  • USB 2.0
• Power and analog devices from Linear Technology
  • Switching power supply LTM4601
  • Switching and step-down regulators LT1931, LT3481, and LTC3418
  • Analog-to-digital converter LTC2402 
  • LDO regulators LT1963 and LT1761
• Clocking
  • 50-MHz and 125-MHz on-board oscillators
  • SMA inputs/outputs
  • I/Os for the two HSMC connectors
  • Various buttons, switches, and indicators
• Display
  • 128 x 64 graphics LCD
  • 2-line x 16-character LCD
• Connectors
  • Two HSMCs
  • USB type B
• Debug tools
  • Three HSMC debug cards (two loop-back and a debug header)
• Cables and power/analog
  • 14-V to 20-V DC input
  • On-board power measurement circuitry
  • 19.8 W per HSMC interface
  • Power cord with plug adapters (U.S., UK, and EU)
• Cyclone III FPGA Development Kit, CD-ROM (download all CD contents via FTP)
  • Design examples for the Cyclone III FPGA development board
  • Complete documentation (see Table 2)
    • User guide
    • Reference manual
    • Board schematic and layout
    • Bill of materials (BOM)
    • Product and partner information
• Altera Complete Design Suite (download from Altera Download Center)
  • Quartus^® II design software
    • Subscription Edition (optional feature, available for purchase)
    • Web Edition (no charge, Windows only)
  • ModelSim^®-Altera software
    • Altera Edition (optional feature, available for purchase)
    • Web Edition (no charge, Windows only)
  • MegaCore^® IP Library - OpenCore Plus evaluation
    • Includes Nios II processor (evaluation license)
  • Nios II Embedded Design Suite, Evaluation Edition (no charge)
  • DSP Builder (optional feature and available for purchase)
  • Video demos of Quartus II software and Nios II embedded processor

Figure 1. Cyclone III FPGA Development Board

Available Documentation

Notes:

1. This kit installation works with Quartus II Design Software version 11.1.0.
2. This kit installation works with Quartus II Design Software version 11.0.0.
3. This kit installation works with Quartus II Design Software version 10.1.0.
4. This kit installation works with Quartus II Design Software version 9.1.2.

Errata

There are two known errata on this development kit. The problems are with the on-board power monitor circuitry and a reset issue with the embedded USB-Blaster circuitry. Both bugs can be fixed by downloading an updated MAX II CPLD programming file.

To see if your board needs the updated programming file, press and hold the CPU_RESET pushbutton. If the Power Display does not show “1337” or higher or shows nothing at all, you should upgrade your board to the new programming file.

Download the zip file that contains the files needed to upgrade your board, and then follow the instructions in the max2_upgrade_instructions.txt text file.

Related Links

• Other Cyclone III FPGA-based development kits
• Cyclone III Design Guidelines (PDF)
• Quartus II design software to begin your Cyclone III design
• Literature for Cyclone III low-cost FPGAs
• Nios II 32-bit embedded processor solutions
• Digital signal processing (DSP) in Cyclone III FPGAs
• Power Management Resource Center