from Altera
- Ordering Information
- Licensing
- Documentation
- Example Processor Systems
- Reference Designs
- Demonstration Designs
- Development Kit Contents
The Altera® Embedded Systems Development Kit, Cyclone® III Edition is a complete development platform for prototyping embedded systems on Altera’s low-cost, low-power FPGA family (see Figure 1).
This kit is an ideal choice for developers running Linux on the Nios® II processor. Download the Nios II Hardware Reference Design for Linux, Cyclone III (EP3C120) Edition Release R15 to give your design a head start (download .zip file via FTP).
The reference design includes:
- Quartus® II project file compatible with Quartus II software version 9.0 and later
- Cyclone III FPGA development board design files
- U-boot files
Development Hardware
- A Cyclone III FPGA-based board with high-speed mezzanine card (HSMC) connectors to interface to a wide range of daughtercards
- LCD multimedia HSMC to interface to common peripherals such as standard definition (SD) card, LCD color touch panel, etc.
- Multipurpose HSMC for software debugging and developing interfaces for USB 2.0 and Santa Cruz daughtercards
Design Examples
- Prebuilt processor systems
- Nios II EP3C120 general-purpose microprocessor system
- Nios II EP3C120 microprocessor system with LCD controller
- Ready-to-run demos for quickly evaluating processor systems, intellectual property (IP), and operating systems
- Example software applications with source code to accelerate software development
Out-Of-Box Experience
This board is, in itself, an embedded system. On power-up, you can load a menu of “ready-to-run” demo applications. When connected to a network port, the Board Update Portal web page is served. From there, you can remotely update the board with a new design. See the user guide for details.
This design is provided as a prebuilt processor system called the Nios II EP3C120 microprocessor system with LCD controller.
Figure 1. Altera Embedded Systems Development Kit, Cyclone III Edition

Ordering Information
Tables 1 and 2 show the ordering code and pricing information for the Altera Embedded Systems Development Kit, Cyclone III Edition and the Embedded IP Suite.
| Table 1. Altera Embedded Systems Development Kit, Cyclone III Edition Ordering Code and Pricing Information | ||
| Ordering Code | Price | Ordering Information |
|---|---|---|
| DK-EMB-3C120N | $1,595 |
Purchase online via Altera's eStore or contact your local Altera distributor to place your order. |
Licensing
Software
The Altera Embedded Systems Development kit comes with Quartus II Web Edition Software and the Nios II Embedded Design Suite.
Intellectual Property
Intellectual property (IP) licenses are sold separately. You may still install and start designing with any Altera IP core via the OpenCore Plus (PDF) simulation and hardware evaluation feature.
| Table 2. Embedded IP Suite | ||
| Ordering Code | Price | Ordering Information |
|---|---|---|
| IPS-EMBEDDED | $995 | This Embedded IP Suite includes all the IP you need to ship a standard Nios II processor design. Upgrade your kit with this perpetual use, royalty-free license bundle for embedded design.
|
Available Documentation
Tables 3 through 6 show available documentation, example processor systems, reference designs, and demonstration designs.
| Table 3. Documents Available for the Altera Embedded Systems Development Kit, Cyclone III Edition | |||
| Document | File Format | Download | Language |
|---|---|---|---|
| User Guide | Adobe PDF | English | |
| Reference Manuals | Adobe PDF | ||
| Board Assemblies | Adobe PDF | ||
| Board Mechanicals | Adobe PDF | ||
| Board Schematics | Adobe PDF | ||
| Bill of Materials | Microsoft Excel | ||
Example Processor Systems
| Table 4. Additional Downloads for the Altera Embedded Systems Development Kit, Cyclone III Edition | |
| Download | Description |
|---|---|
| Data Sheet: Nios II 3C120 Microprocessor System with LCD Controller (PDF) |
Full system description of the Nios II EP3C120 Microprocessor System with LCD Controller. |
| Altera Embedded Systems Development Kit, Cyclone III Edition CD (ZIP) | Contents CD that ships with the kit. Includes board design files, demos, documentation, examples, and factory recovery image. |
Reference Designs
| Table 5. Reference Designs Available for the Altera Embedded Systems Development Kit, Cyclone III Edition | ||
| Design | Vendor |
Description |
|---|---|---|
| Application Selector Factory Default | Altera | Default application for in-system and remote system update. |
| Mandelbrot Hardware Acceleration | Altera | Hardware acceleration using the Nios II C-to-Hardware (C2H) acceleration compiler. |
| SLS USB 2.0 Reference Design | SLS | Reference design showcasing USB 2.0 IP. |
| More Designs | Altera | Additional designs available from Altera. |
Demonstration Designs
| Table 6. Demo Designs Available for the Altera Embedded Systems Development Kit, Cyclone III Edition | ||
| Design | Vendor |
Description |
|---|---|---|
| TES DAVE 2D Graphics Demo | TES | Vector graphics engine showcasing sub-pixel accuracy, anti-aliasing, alpha blending, bit blitting, and 2.5D imaging. |
| Photo Frame by PlanetWeb | PlanetWeb | Displays pictures and on the LCD color touch panel in slide show, thumb nail, and other modes. |
| SpectraWorks GUI Demo | PlanetWeb | Showcases graphics, text, and instant re-branding capabilities of PlanetWeb Spectra Core Graphics IP. |
| Menu Demo by PlanetWeb | PlanetWeb | Demonstrates menu rendering and instant re-branding. |
Development Kit Contents
The Altera Embedded Systems Development Kit, Cyclone III Edition is comprised of the Cyclone III FPGA development board, LCD multimedia HSMC board, and HSMC to Santa Cruz/USB/Mictor card. The kit is RoHS compliant and features:
- Cyclone III development board
- Cyclone III EP3C120F780 FPGA
- Embedded USB-Blaster™ circuitry (including an Altera MAX® II CPLD) allowing download of FPGA configuration files via the flash device or the host computer
- Memory
- 256 Mbytes of dual-channel DDR2 SDRAM with ECC
- 8 Mbytes of pseudo SRAM
- 64 Mbytes of flash
- Communication ports
- 10/100/1000 Ethernet
- USB 2.0
- Power and analog devices from Linear Technology
- Switching power supply LTM4601
- Switching and step-down regulators LT1931, LT3481, and LTC3418
- Analog-to-digital converter LTC1865
- LDO regulators LT1963 and LT1761
- Clocking
- 50-MHz and 125-MHz on-board oscillators
- SMA inputs/outputs
- Inputs/outputs for the two HSMCs
- Various buttons, switches, and indicators
- Display
- 128 x 64 graphics LCD
- 2-line x 16-character LCD
- Connectors
- Two HSMCs
- USB type B
- Debug tools
- Three HSMC debug cards (two loop-back and a debug header)
- Cables and power/analog
- 14-V to 20-V DC input
- On-board power measurement circuitry
- 19.8 W per HSMC interface
- Power cord with plug adapters (US, UK, EU)
LCD Multimedia HSMC Card
- LCD touch-screen display
- 800 x 480 pixel size
- Audio CODEC
- SD Flash
- 10/100 Ethernet physical layer/media access control (PHY/MAC)
- Connectors
- VGA output
- Composite digital TV in
- Serial connector (RS-232 DB9 port)
- PS/2
- Ethernet connector (RJ-45)
HSMC to Santa Cruz/USB/Mictor Card
- Santa Cruz header
- Mictor connector for software debugging
- Adjustable logic levels between HSMC and SC interface signals
- High-speed USB 2.0 On-The-Go transceiver
- SMA connector for external clock input
- SD card socket
Altera Embedded Systems Development Kit, Cyclone III Edition CD-ROM
- Design examples, demos, and prebuilt processor systems
- Tutorials (hardware and software)
- Board documentation
Cables and Accessories
- 14-V to 20-V DC input
- Power cord with plug adapters (US, UK, EU)
- SD card and USB to SD card reader
- USB cable
- 16-V power supply
- Ethernet (RJ-45) cable (7 ft.)
Altera Complete Design Suite DVD
- Quartus II Web Edition (FPGA design software)
- ModelSim®-Altera Web Edition (FPGA simulation software from ModelSim)
- Nios II Embedded Design Suite, Evaluation Edition (32-bit microprocessor software)
- MicroC/OS-II real-time operating system evaluation
- Nios II C2H acceleration compiler evaluation
- NicheStack TCP/IP Network Stack - Nios II Edition evaluation
- MegaCore IP (library of IP cores)

