Direct Digital Synthesis
Many communications systems—such as applications including cellular base stations, global positioning system (GPS) and very small aperture terminal (VSAT) applications, digital modems, and RADAR systems—require a locally generated tunable reference sinusoid. Digital transmission schemes often require signals to be modulated and transmitted over multiple channels using a resource allocation method such as frequency division multiplexing. To ensure that the receiver can demodulate each signal correctly, frequency offset between local oscillators on the transmit and receive sides should be zero. To minimize any potential mismatch, the carriers can be generated at the transmitter as multiples of an exact reference frequency. On the receiving side, the locked reference frequency can be similarly scaled to generate the required local carrier signals.
The numerically controlled oscillator (NCO) Compiler can synthesize directly digital waveforms at the required frequency by the method shown in Figure 1. In this scheme, the phase increment input, ΔΦ, generates a sinusoid at the desired output frequency fo , which can be calculated from the following equation:
where fCLK is the clock frequency of operation of the NCO and N is the phase accumulator width. Thus, the factor N can be varied to increase or decrease the output frequency of the NCO as desired.
Figure 1. Direct Digital Synthesis
Design Files Provided
The direct digital synthesis (DDS) reference design files are located in the \refdesigns\dds\* folder. The design uses an internal ROM-based architecture with a phase accumulator width of 24 for high resolution, a ROM address width of 10, and a magnitude precision of 8 bits. The design generates a 2.5-MHz sinusoid with a spurious free dynamic range (SFDR) greater than 50 dB from a reference frequency of 100 kHz.
To download the reference design files, go to the NCO product page and click on the free test drive icon.
Table 1 describes the files provided with this reference design.
| Table 1. DDS Reference Design Files |
| File |
Description |
| dds.gdf |
Top-level design file, which can be compiled and simulated in the MAX+PLUS® II or QuartusTM II software. |
| dds.v |
Top-level Verilog HDL model. |
| tbdds.v |
Verilog HDL testbench, which prints the output of the digital synthesizer to a text file. |
| dds.mdl |
Simulink model of the DDS design. |
Functional Description
Altera’s NCO Compiler generates high-precision digital sinusoids yielding accurate carriers of any required frequency. However, because the output waveform has finite precision and the signal is periodic, spurious harmonic components and noise will be unavoidably evident in the spectrum. A measure of the quantization error can be gained from the signal-to-noise ratio (SNR) at the output of the NCO. The theoretical quantization noise power Pn , after quantization of a signal to b bits of precision, is given by the following equation:
Thus, increasing the magnitude precision by one bit gains approximately 6 dB in SNR at the output of the NCO. SFDR is a measure of the power of a desired component relative to spurious components in the spectrum, and should be large for spectrally pure sinusoids.
To increase the SFDR at the output of the NCO, the reference design uses a 57-tap low-pass filter created with Altera’s finite impulse response (FIR) Compiler. This filter attenuates the unwanted components in the spectrum even further. If your design requires increased spectral purity, you can increase the resolution of the filter output to increase the resulting SNR. Alternatively, adding noise into the system in a controlled manner can serve to decorrelate the signal, and reduce the spurious amplitudes by spreading the noise over a wider bandwidth.
The plots in Figure 2 show the result of filtering the output sinusoid. At the output of the NCO, the SFDR is 50 dB. After filtering, the SFDR is increased to over 100 dB, resulting in an extremely pure synthesized sinusoid.
Figure 2. NCO Frequency Response
Applying a control signal at the frequency modulation input of the NCO, an integrated feature of the NCO Compiler, you can implement frequency shift keying (FSK) modulation schemes by shifting the value of the reference phase input. Varying the scaling factor with a pseudo-randomly time-varying sequence generates a frequency-hopping carrier that can be used in spread-spectrum schemes.
The NCO Compiler is not restricted to sinusoidal generation. If you select a ROM-based architecture, you can alter the ROM files to store the data of any periodic waveform.
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