- AMPPSMd-Approved IP Cores
- Additional IP Cores
- Development Boards
- Additional Services and Features
- Contact Information
Empowering customers worldwide for over 20 years, Microtronix specializes in the development of cost-effective FPGA-based hardware, intellectual property (IP) cores, PCB, and software solutions for custom networking, communications, and embedded applications.
Having ported the µClinux kernel distribution to the Altera® Nios® embedded processor architecture in 2001, Microtronix continues to support this technology on the second-generation Nios II processor with its line of engineering FPGA design kits and IP core products.
Today the company focuses their hardware talent on developing high-performance IP cores including a line of SDRAM memory controllers and the application of FPGA cores for accelerating high-definition (HD) video processing and conversion. Their software expertise is in developing low-level hardware drivers, such as PCITM, PCI Express® , and Ethernet, TCP/IP protocols, and Linux kernel development.
Microtronix FPGA development kits, design kits, and IP cores support the following capabilities and applications: Ethernet, USB, processor bridge interfaces such as the Avalon® bus, SDR/DDR/Mobile DDR, DDR2, and DDR3 memory devices, HD video processing and encoding/decoding, DVI, PCIe®, LVDS serializer/deserializer (SERDES) Camera Link, and I2C master, slave, and parallel I/O (PIO) IP solutions.
Microtronix currently provides the products listed in Tables 1 through 5.
|Table 1. Available AMPP-Approved Certified IP Cores (1)|
|Avalon Multi-Port SDRAM Memory Controller||The Microtronix Avalon Multi-Port SDRAM Memory Controller IP core is designed for building high-performance multi-master streaming data systems. The easy-to-use core simplifies memory designs by supporting SDR, DDR, DDR2, and Mobile DDR memory devices using a single system bus interface.|
|Avalon Mobile DDR Memory Controller||The Microtronix Avalon Mobile DDR Memory Controller IP core is designed for building high-performance Avalon Memory-Mapped (Avalon-MM) and Avalon Streaming (Avalon-ST) multi-master streaming data systems. Advanced design features enable maximum system clock rates using low-speed FPGAs and standard memory devices, lowering your production cost.||Stratix IV, Stratix III, Stratix II, Stratix GX, Cyclone IV, Cyclone III, Cyclone II, Arria II GX|
|Streaming Multi-Port SDRAM Memory Controller||The Microtronix Streaming Multi-Port SDRAM Memory Controller IP core is designed for building high-performance multi-master streaming data systems. The easy-to-use core supports SDR, DDR, Mobile DDR, and DDR2 memory devices.||Stratix III, Stratix II, Stratix GX, Cyclone III, Cyclone II, Arria GX|
|HyperDrive Multi-Port DDR2 Memory Controller||The Microtronix HyperDrive Multi-Port DDR2 Memory Controller IP core is designed for building high-performance multi-master streaming data systems. The easy-to-use core maximizes the date rate of DDR2 memory systems.||Stratix III, Stratix II, Stratix GX, Cyclone III, Cyclone II, Arria GX|
|Lancero- Scatter-Gather DMA Engine for PCI Express||The Microtronix Lancero-Scatter-Gather DMA Engine for PCI Express provides either a Target Bridge or a Descriptor Bridge SGDMA solution for PCI Express endpoints. The IP connects seamlessly to Altera's PCI Express hard IP core, providing a transparent high-speed datapath over PCI Express.||Stratix IV, Stratix III, Stratix II, Stratix GX, Cyclone IV, Cyclone III, Cyclone II, Arria II GX|
|I2C Master-Slave-PIO Controller||The Microtronix I2C Master-Slave-PIO Controller IP core is a complete I2C solution offering three modes of operation: I2C master controller, I2C slave controller, and an 8-bit PIO slave device.||Stratix II, Cyclone II, MAX® II|
|Video LVDS SerDes Transmitter-Receiver||The Microtronix Video LVDS SerDes Transmitter- Receiver IP core provides a complete, easy-to-use SERDES solution to interface a wide variety of video host systems to flat panel displays. The transmitter and receiver cores support both 28-bit (8-bit RGB) and 35-bit (10-bit RGB) parallel data configurations using either 4 or 5 LVDS serial channels. Transmitter and receiver modules can be cascaded to create dual and quad LVDS links supporting display panel resolutions up to 1080p at 120 Hz and beyond.||Stratix II, Cyclone II, MAX II|
- The "Altera Megafunction Partners Program (AMPP) Approved" certification indicates IP cores that meet Altera's sales standards and pass rigorous engineering testing.
|Camera Link Transceiver||The Microtronix Camera Link Transceiver IP core is designed for building vision systems incorporating Camera Link communication interfaces using Base, Medium, and Full Channel-Link configurations. The core supports camera control signals, serial communication, and video data.||Cyclone IV, Cyclone III, Cyclone II|
|Table 4. Design Kits|
|Lancelot VGA Controller IP Design Kit||Santa Cruz Daughter Card|
|Camera Link Design Kit||HSMC Daughter Card|
|Video Over IP Add-on Kit||HSMC Daughter Card|
|Table 5. Daughter Cards|
|Cyclone II EP2C35 Firefly II Module||Santa Cruz Daughter Card|
|Cyclone II EP2C50 Firefly II Module||Santa Cruz Daughter Card|
|HDMI Receiver, Transmitter||HSMC Daughter Card|
|32 MB Flash, Serial Port||HSMC Daughter Card|
|Gigabit Ethernet PHY-HDMI Transmitter||HSMC Daughter Card|
|Quad Link LVDS Interface||HSMC Daughter Card|
Microtronix provides the following additional services and features:
- Hardware engineering design and development
- Board-level prototype design and manufacturing
- Nios II system-on-a-chip (SOC) core design and customization
- IP core design, customization, and integration
- Conversion of C-code algorithms into register transfer level (RTL)
- HD video processing IP
- Software kernel, device driver, and application development
- Linux consulting and design
- Hardware design consulting
- Technical support
For additional information, contact:
Microtronix Datacom, Ltd.
9-1510 Woodcock Street
London, ON Canada
Phone: 01 (519) 690-0091
Fax: 01 (519) 690-0092