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UTOPIA Level 2 to UTOPIA Level 3 MUX

Home > Products > Intellectual Property > Communications > UTOPIA > UTOPIA Level 2 to UTOPIA Level 3 MUX

from SOCmagic

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AMPP Approved
OpenCore Support



Features

  • Conforms to UTOPIA Level 2 Version 1.0 (af-phy-0039.000) and UTOPIA 3 physical layer (PHY) interface (af-phy-0136.000) specification
  • Four port (UTOPIA level 2) to one port (UTOPIA level 3) multiplexer
  • Single physical layer (SPHY) operation on the side of UTOPIA level 2 and Multi-PHY (MPHY) operation on the side of UTOPIA level 3
  • Cell-level handshaking
  • Internal four-cell first-infirst-out (FIFO) buffers supported for transmit
  • Supports both direct status indication mode and single clav mode at the port of UTOPIA level 3
  • Supports both 52-byte and 54-byte mode at the ports of UTOPIA level 2
  • Supports both 52-byte and 56-byte mode at the port of UTOPIA level 3
  • Optimized for Altera FLEX® 10KE architecture
  • Automatically discards erroneous cell information

Block Diagram

Figure 1 shows the block diagram for the SOCmagic megafunction.

Figure 1. Block Diagram

SOCmagic

Description

Since the UTOPIA level 3 interface works at 100 MHz, the project becomes more challenging for either the chip designer or the printed circuit board (PCB) designer. According to this, UTOPIA level 3 specification covers only the physical connection of a single ATM interface with a single PHY interface. So we cannot apply the funtion of bus structure to support Multi-PHY mode just like what the UTOPIA level 2 does. This function is designed to fulfill the adaptation between UTOPIA level 2 and UTOPIA level 3.

UTOPIA level 2 to UTOPIA level 3 MUX is designed for adaptation of 622 MHz PHY layer to 2.5 GHz aTM layer. Four UTOPIA level 2 ports work as master, connected to 622 MHz PHY layer, while the UTOPIA level 3 port works as slave., connected to 2.5 GHz ATM layer. In this version, four UTOPIA level 2 interfaces support SPHY mode, one UTOPIA level 3 port supports MPHY mode and four sub-ports. In the next version, four UTOPIA level 2 ports will support MPHY mode with up to 31 PHY devices; one UTOPIA level 3 port will support all 128 sub-ports.

The UTOPIA level 2 interfaces work as master with SPHY mode. They receive cells from physical layer and write cells into internal cell buffer. If 52-byte mode is used, cells will be written into cell buffer directly; otherwise, when 54-byte mode is used, a word will be inserted between 3rd and 4th word so that a 56-byte cell can be read correctly. The UTOPIA level 2 interfaces detect and discard cells that are too short, and discard excess words from cells that are too long.

The UTOPIA level 3 interface workds as slave with MPHY mode supporting four sub-ports. The interface is polled by ATM layer to determine which internal cell buffer is ready to transfer cells. It reads cells from polled cell buffer and sends cells to ATM layer.

Device Utilization Example

Table 1 lists the typical device utilization results for the megafunction.

Table 1. Typical Device Utilization for the Megafunction
Device Speed Grade Utilization Performance
(fMAX)
Parameter Setting
Logic Cells EABs (1)
EPF10K50E -1 551 8 90 MHz (rx2clk)
102 MHz (rx3clk)
Contact SOCmagic

Note:

  1. EABs = Embedded array blocks

Contact Information

For additional information, you can contact SOCmagic at:

SOCmagic
Shekou Cuiweiyuan, 1-203
Shenzhen, 518067
China
E-mail: info@socmagic.com
http://www.socmagic.com

 
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