DVB-RCS CTC Turbo Decoder TC1000
Overview
TC1000-WiMAX is a convolutional turbo code (CTC) decoder optimized for DVB-Return Channel Satellite (DVB-RCS) specification EN 301790 applications. It offers near floating-point bit-error rate (BER) performance. The decoder's high-speed architecture is ideal for achieving the highest throughput possible for all Altera® device families.
Three throughput levels are available:
-
2x core version for 20–40 Mbps
-
4x core version for 40–60 Mbps
-
8x core version for 60–100+ Mbps
Throughput depends on the selected device and varies according to block size. Please contact TurboConcept for additional information.
An efficient parallel architecture allows the core memory usage to be nearly constant for all throughput levels. A corresponding encoder core is also available. Contact TurboConcept for more details.
Features
- Near floating-point bit-error rate (BER) performance
- High-speed and low-complexity core
- Scalable throughput from 30 to 100+ Mbit/s decoded
- Selectable maximum block size: 256, 512, 1024, or 2048 bytes
- Code rates available: 1/3, 1/2, 2/3, 3/4, 4/5, 6/7
- Full DVB-RCS compliance (all block sizes, code rates, reverse ordering, etc.)
- Block-by-block change of block size, code rate, and modulation
- Low latency
- Channel quality monitoring
- Low-cost Cyclone® family profile (beginning with Cyclone II EP2C8 device)
- High-speed Stratix® family profile (beginning with Stratix II FPGAs)
- Industry reference core—field proven
Standard Deliverables
The core is delivered as a synthesized netlist. Additional deliverables include:
-
RTL-model simulation libraries
-
MATLAB/C bit-true model
-
Testbench VHDL source code
-
Technical support and documentation
Contact Information
For additional information, contact TurboConcept at:
TurboConcept
40, rue Joseph Fourier
29280 Plouzane, France
Tel. +33 2 98 05 63 80
Fax +33 2 98 05 63 89
E-mail: info@turboconcept.com
http://www.turboconcept.com
|
Literature
> 
