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Features
- Reed-Solomon and convolutional encoding
- Segment and field sync
- Pilot insertion
- Variable sample rate interpolation
- 1 to 4 channels per core
- Multiple cores providing more than four channels
- Optional internal intermediate frequency (IF) conversion
- External AD9857 DDS interface
Block Diagram
Figure 1 shows a block diagram of this megafunction.
Figure 1.
Description
The CMS0038 multi-channel ATSC 8-VSB modulator with integrated Channel Coders has been designed specifically to implement the 8-VSB requirements of the ATSC Digital Television Standard (A/53). The core provides all the necessary processing for 8VSB modulation of up to four transport streams. Supported output formats include baseband in-phase and quadrature (IQ) and IF. Every effort has been made to keep the size of the block to an absolute minimum in order to target the low-cost Altera® FPGA families.
Device Utilization and Performance
Table 1 lists the typical device utilization results for the megafunction.
| Table 1. Typical Device Utilization for Altera Megafunctions | |||||||
| Target Altera Device | Speed Grade | Logic Elements (LEs) | M9K Blocks | DSP Blocks | Performance (fMAX) | Parameter Setting | |
|---|---|---|---|---|---|---|---|
| EP3C25F324 | -8 | 10K | 40 | 74 | 100 MHz | 1x TS channel | |
| EP3C25F324 | -8 | 15K | 60 | 92 | 100 MHz | 2x TS channels | |
Deliverables
- Core encrypted VHDL for Quartus® II software
- Testbench pre-compiled simulation libraries for ModelSim® tool
- VHDL test scripts
- Documentation user guide
- One year of technical support and maintenance
Contact Information
For additional information, contact Commsonic at:
Commsonic Limited
St Johns Innovation Centre
Cowley Road
Cambridge CB4 0WS
ENGLAND
Tel: +44(0)1223 421845
Fax: +44(0)1223 871071
Email: info@commsonic.com
URL: www.commsonic.com
