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DINT2FP Integer-to-Floating-Point Pipelined Converter

from Digital Core Design

AMPP Approved
OpenCore Support



Features

  • Fully complies with the IEEE 754 specification
  • Double-word integer input numbers (up to 4 bytes)
  • Single-precision real output numbers
  • Simple interface
  • No programming required
  • Two levels of pipelining
  • Full accuracy and precision
  • Results available at every clock
  • Fully configurable
  • Fully synthesizable, static synchronous design with no internal tri-states

Description

The DINT2FP megafunction is a pipelined integer-to-floating-point converter. The input and output number format complies with the IEEE 754 specification. The function supports double-word integers (up to 4 bytes) and single-precision real numbers. The convert operation is pipelined to 2 levels, and the input data is fed in every clock cycle. The first result appears after two clock periods of latency, and subsequent results are available at each clock cycle. The DINT2FP megafunction offers full accuracy and precision.

Block Diagram

Figure 1 shows the block diagram for the DINT2FP megafunction.

Figure 1. Block Diagram for the DINT2FP Megafunction

Figure 1. DINT2FP Block Diagram

Device Utilization Example

Table 1 lists the typical device utilization results for the megafunction.

Table 1. Typical Device Utilization for the Megafunction
Device Speed Grade Utilization Parameter Setting
Logic Cells Performance
(fMAX)
FLEX® EPF10K100E -1 930 45 MHz Contact Digital Core Design
APEXTM EP20K100E -1 856 48 MHz Contact Digital Core Design
ACEX® EP1K100E -1 930 48 MHz Contact Digital Core Design

Contact Information

For additional information, contact Digital Core Design at:

Digital Core Design
Wroclawska 94
41-902 Bytom
Poland
Tel. +48 32 282 82 66
Fax +48 32 282 74 37
E-mail: info@dcd.com.pl
URL:  www.dcd.com.pl

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