ATA-5: UDMA-66 IDE Controller

from Nuvation

Features

• ATA/ATAPI-5 standard compliant host
• UDMA-66 transfer speed capabilities (66 Mbps maximum transfer speed)
• Receive and Transmit FIFO buffers for data transfer through the core
• Direct memory access / ultra direct memory access (DMA/UDMA) and parallel I/O (PIO) data transfers supported
• Dedicated signal for polling advanced technology attachment (ATA)-device status
• Dedicated signal for executing Software Reset command
• Two Clock domains: Core Clock and System Clock
• Dedicated system side input bus for writing data to the ATA device
• Dedicated system side output bus for data read from the ATA device
• Required core clock speed: 100 MHz
• Available PIO modes: 0 and 4
• Number of ATA devices supported on the integrated drive electronics (IDE) bus: 1

Block Diagram

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Description

The ATA-5 / UDMA-66 IDE Core is a drop-in ATA-Host intellectual property (IP) core used for interfacing to an ATA-device. It handles all transactions on the IDE bus for various commands that are dispatched from the system. After a command is dispatched, the ATA-core executes the command on the ATA device. Once the command execution is completed, the final status is reported to the system side. At that time, the system can execute a new command.

Device Utilization & Performance

Table 1 lists the typical device utilization results for the megafunction.

Note to Table 1:

1. LEs = logic elements

Deliverables

• Encrypted library provided

Contact Information

For additional information, contact Nuvation at:

Nuvation
3590 North First Street
San Jose, CA 95134
USA
Phone: (408) 228-5580
Fax:  (408) 228-5590
Email: ipcores@nuvation.com
URL: www.nuvation.com