Interlaken is a scalable protocol that enables chip-to-chip packet transfers at rates from 10 Gbps to 100 Gbps and beyond. Altera’s Interlaken intellectual property (IP) core continues to scale with today’s demand for more bandwidth and higher performance needs. Altera has been a part of the Interlaken Alliance since its inception in 2007 and continues to innovate new protocol features to provide customers with robust and easy-to-implement Interlaken IP solutions. Altera entered the market with 25G Interlaken IP cores and now offers up to 300G Interlaken IP cores.
Brocade Integrates and Qualifies Altera's 120G and 150G Interlaken IP
|“Altera’s Interlaken IP delivers the bandwidth scalability and data efficiency our customers require not only for big data, but also for other applications that require high-rate data transfers through the network.”|
Majid Afshar, Vice President of ASIC and Hardware Engineering, Brocade
Altera's Interlaken IP provided Brocade a favorable IP strategy enabling them to simply reconfigure the IP for their various line module configurations. This uniqueness enables Brocade to offer their customers the options to choose the right level of services given certain budget constraints. The combination of Altera’s Interlaken IP core in the Stratix® V FPGA with Brocade's router innovations eliminates the bottlenecks to scale cloud-optimized networks. This allows businesses to manage high volumes of big data and other applications that require high-rate data transfers through the network.
Altera's Interlaken IP core is ideal for multi-terabit routers and switches for access, carrier Ethernet, and data center applications that demand high IP configurability to optimize for system performance and scalability.
Figure 1 shows Brocade's line card module integrated with Altera's Interlaken IP in the Stratix V FPGA.
Figure 1. Brocade MLX Series Multi-Terabit Router with Altera Interlaken IP and Stratix V FPGA
Altera's Interlaken IP Solution
The Interlaken IP core includes Altera’s technology-leading transceivers: physical medium attachment (PMA), physical coding sublayer (PCS), and media access control (MAC) layers. The PCS and PMA layers are hardened within the Stratix V and Arria® V FPGAs, thereby saving customers 30 percent to 50 percent of FPGA logic resources. In addition to resource savings, the Interlaken IP has been through extensive simulation verification and has been proven to work on multiple internal and customer platforms. Altera's Interlaken IP solution has passed the Interlaken Alliance's device interoperability tests. Altera continues to set up interoperability activities with leading ASSP vendors for next-generation platforms.
Table 1 shows how Altera's Interlaken IP improves your performance and productivity.
Table 1. Performance and Productivity Improvements
|Parameter tuning enables bandwidth usage improvements as high as 35%||15% IP core timing margin accelerates full design timing closure|
|Consistent delivery of over 150 million packets / second on multiple customer platforms and across various vertical markets*||OpenCore Plus feature allows you to test drive IP for free and without a license|
|Unique combination of hard and soft IP delivers high-frequency user clocking performance (>250 MHz) and 30% reduced logic resourcing||Fully integrated Interlaken IP includes MAC, PCS, and PMA layers for easy FPGA IP integration|
*Interlaken configuration specific
Table 2 highlights the features and benefits of Altera's Interlaken IP.
Table 2. Features and Benefits
|Data rate up to 12.5 Gbps||Maximizes platform flexibility to increase bandwidth and ensures scalability over time|
|Multi-lane configuration up to 24 channels|
|Interleave (segment) mode and packet mode support||Flexible data handling enables improvements to overall system performance and successful interoperability|
|Multi-segment user interface support|
|Up to 256 logical channels|
|In-band and out-of-band flow control (calendar page options)||
Resilient data transmission due to unexpected failures or glitches and reliable data integrity over multiple media
|Tunable pre-emphasis and equalization settings|
Figure 2. Typical Application Block Diagram
Altera's Interlaken IP core is supported on the following device families:
- 50G Interlaken MegaCore Function User Guide (PDF) for 20 nm and 28 nm Altera devices
- 100G Interlaken MegaCore Function User Guide (PDF) for 20 nm and 28 nm Altera devices
- Interlaken MegaCore Function User Guide (PDF) for 40 nm Altera devices
Interlaken in the News
- Altera Releases Quartus® II Software Arria 10 Edition v14.0 press release
- Brocade Integrates Altera's 120G and 150G Interlaken IP into its Multi-Terabit Core Routers press release
- Altera Completes Latest Upgrade to IP Portfolio Targeting 28 nm Devices press release
- Altera Demonstrates Interlaken Compatibility with Cavium Octeon Multicore Processors press release