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DI2CSB I2C Bus Interface-Slave

Home > Products > Intellectual Property > Interfaces & Peripherals > I2C > DI2CSB I2C Bus Interface-Slave

from Digital Core Design

Request Free Evaluation



AMPP Approved
OpenCore Support
SOPC Builder Ready



Features

  • Slave transmit and receive operations
  • Supports read, write, burst read, burst write, and repeated start
  • Supports speeds up to 400 Kbytes per second (standard and fast speeds)
  • 7-bit addressing
  • No programming required
  • Allows easy connection to target device (e.g., LCD display, temperature, and pressure sensors)
  • Fully synthesizable, static synchronous design with no internal tri-states

Block Diagram

Figure 1 shows the block diagram for the DI2CSB I2C bus interface-slave megafunction.

Figure 1. DI2CSB I2C Bus Interface-Slave Block Diagram

Figure 1. DI2CM I^2 C Bus Interface-Slave Block Diagram

Description

The DI2CSB function provides an interface between a target device (e.g., memory, LCD display, pressure sensors) and an I2C bus. It can work as a receiver or transmitter depending on the working mode determined by the master. The DI2CSB function is used in automotive audio-video systems and embedded microprocessor systems.

Device Utilization Example

Table 1 lists the typical device utilization results.

Table 1. Typical Device Utilization
Device Speed Grade Utilization Performance
(fMAX)
Parameter Setting
Logic Cells EABs/ESBs (1)
EP20K60E -1 79 0 132 MHz Contact DCD
EPF10K30E -1 93 0 129 MHz Contact DCD
EPM7032AE -4 31 - 104 MHz Contact DCD
EPM9320A -10 31 - 58 MHz Contact DCD

Note:

  1. EABs = Embedded array blocks; ESBs = Embedded system blocks

Contact Information

For additional information, contact DCD at:

Digital Core Design
Wroclawska 94
41-902 Bytom
Poland
Tel. +48 32 282 82 66
Fax +48 32 282 74 37
E-mail: info@dcd.com.pl
http://www.dcd.com.pl

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