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PCI Express Compiler: x1, x4, and x8 MegaCore Functions

from Altera Corporation

View Literature
Download Free Evaluation



OpenCore Plus Support
SOPC Builder Ready
I-Test



Features

  • Suitable for endpoint applications (including nontransparent bridges) with x1, x4, and x8 lane support
  • Proven interoperability at PCI Express Base Specification Revision 1.1 compliance
  • Additional interoperability with multiple platforms, chipsets, or ASSPs
  • Highly parameterizable
    • Configurable maximum payload (up to 2 Kbytes and configurable retry buffer (up to 16 Kbytes)
    • Reference clock support (100, 125, or 156.25 MHz)
    • Optional end-to-end cyclic redundancy code (ECRC) generation/checking and advanced error reporting (AER)
  • Easy timing closure with incremental compilation support
  • Multiple example designs to jump start your designs

General Description

The PCI Express Compiler generates customized PCI Express MegaCore® functions that you can use to design PCI Express endpoints, including nontransparent bridges, or truly unique designs combining multiple PCI Express components in a single Altera® device. The PCI Express MegaCore functions are PCI Express Base Specification Revision 1.1 or PCI Express Base Specification Revision 1.0a compliant.

Additional interoperability and system validation tests have also been performed with multiple platforms, chipsets, and ASSPs.

These popular PCI Express MegaCore functions (x1, x4, or x8 lane configurations) support all memory, I/O, configuration, and message transactions. The MegaCore functions have an optimized application interface to achieve maximum effective throughput. Also, the MegaCore functions are flexible and parameterizable, allowing customization for your specific needs. As an example, the MegaCore functions support a configurable payload, a configurable retry buffer, and also optional support for high-reliability features like ECRC and AER.

There are a number of deliverables available to facilitate the easy adoption and integration of the intellectual property (IP) core into your design. The PCI Express Compiler includes an endpoint testbench that incorporates a simple root-port bus functional model (BFM) and multiple endpoint example designs. You can use these example designs, available in clear-text source-code (VHDL) and Verilog (HDL), as references to kick-start your design while the simple root-port BFM is geared to provide an "out of the box" PCI Express experience.

To facilitate easy system integration, the IP core also supports SOPC Builder for x1 and x4 applications. Further, to provide an easy timing closure flow, the IP core supports incremental compilation. Using the open-source incremental compilation module, once you have configured the highly parameterizable IP core, you can lock down the placement and routing of the IP core to preserve the timing while working on the backend application logic.

IP Evaluation

Use the Altera OpenCore Plus Evaluation to test drive this IP core. For more information on OpenCore Plus hardware evaluation using the PCI Express Compiler MegaCore function, see AN 320: OpenCore Plus Evaluation of Megafunctions (PDF).

Performance

Typical expected performance and utilization figures for this core are provided in the PCI Express Compiler User Guide (PDF).

I-Tested

Altera awards the I-Tested certification to MegaCore functions or Altera Megafunctions Partners Program (AMPPSM) IP cores that have been verified in an Altera FPGA on an evaluation board with the ASSPs, hardware components, or test equipment necessary to ensure interoperability according to the relevant protocols.

Altera has performed significant hardware testing of the PCI Express x1, x4, and x8 MegaCore functions to ensure a reliable solution. The x1, x4, and x8 MegaCore functions have been tested internally with a variety of x86 motherboards, PCI Express switch chips, and embedded microprocessors. Additionally, the x1, x4, and x8 MegaCore functions were tested at the PCI-SIG compliance workshops and passed with extremely high-quality results, including passing 100 percent of the PCI-SIG Gold Tests.

Technical Support

For technical support on this MegaCore function, please visit the Altera mySupport online issue tracking system. You may also search for related topics on this function in the Altera Solutions Database.

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