DR8052EX 8-Bit RISC Extended Microcontroller

from Digital Core Design

Features

• Software-compatible with industry standard 8051
• RISC architecture
• 6.7x faster than the original implementation
• 4-clock periods multiplication
• 5-clock periods division
• Up to 16 Mbytes of external standard data memory
• Up to 256 bytes of internal dual port data memory
• Up to 64 Kbytes of program memory
• User-programmable RAMWE and RAMRD pulses in 1 to 8 clock periods
• De-multiplexed address/data bus to allow easy connection to memory
• Data transfer over 16x faster than the original implementation
• Three 16-bit timer/counters
• Eight additional interrupts
• Two full-duplex serial ports
• I²C bus controller
• Two data pointers (DPTR1 and DPTR2)
• Support for external system functional reviews
• Fully synthesizable, static synchronous design with no internal tri-states
• 670-MHz virtual clock frequency faster than the original implementation (over 100 MHz in a typical 0.25µ technological process)

Block Diagram

Figure 1 shows the block diagram for the DR8052EX 8-Bit RISC extended microcontroller megafunction.

Figure 1. DR8052EX 8-Bit RISC Extended Microcontroller Block Diagram

Description

The DR8052EX soft core function is binary-compatible with the industry-standard 8052 8-bit microcontroller and can achieve performance of up to 50 million instructions per second in today's integrated circuit technologies. The DR8052EX function has a RISC architecture that is 6.7x faster than the original implementation.

Device Utilization Example

Table 1 lists the typical device utilization results for the megafunction.

Note:

1. EABs = Embedded array blocks

Contact Information

For additional information, contact DCD at:

Digital Core Design
Wroclawska 94
41-902 Bytom
Poland
Tel. +48 32 282 82 66
Fax +48 32 282 74 37
E-mail: info@dcd.com.pl
http://www.dcd.com.pl