JTAG Debug Module
The Nios® II architecture supports a Joint Test Action Group (JTAG) debug module that provides on-chip emulation features to control the processor remotely from a host PC. PC-based software debugging tools, such as the Nios II integrated development environment (IDE), communicate with the JTAG debug module and provide designers with facilities for:
- Downloading programs to memory
- Starting and stopping execution
- Setting breakpoints and watchpoints
- Analyzing registers and memory
- Collecting real-time execution trace data
The debug module connects to the JTAG circuitry built into all Altera® FPGAs (shown in Figure 1) and connects to the host PC via a download cable such as the Altera USB Blaster (included in the Nios II development kits) or a system analyzer probe from First Silicon Solutions.
Figure 1. Nios II JTAG Debug Module
Software developers can access the core from host software such as the Nios II IDE (included in all Nios II development kits) or IDEs and debuggers from Altera's embedded software tools partners.
Customers requiring a more advanced set of debugging features can upgrade to code|lab Debug and the FS2 ISA-NIOS probe. Accelerated Technology and First Silicon Solutions have more details.
More information regarding the JTAG debug module and software debugging using the Nios II IDE is available on the Nios II processor handbook.
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