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EDA ACCESS Partner Profiles: Aldec, Inc.

Overview

Aldec, Inc. is committed to delivering high-performance, hardware description language (HDL)-based design verification software for UNIX, Linux, and Windows platforms. Aldec delivers industry-proven mixed HDL verification products and services to FPGA and ASIC designers worldwide.

Aldec is dedicated and responsive to serving its customers’ needs with its offices located around the globe. Continuous innovation, superior product quality, and total commitment to customer service comprise the foundation of Aldec’s strategic objectives. 

Tools

Aldec’s Active-HDL tool provides Windows users with the design entry and verification tools needed to implement all Altera® devices. Active-HDL’s single design environment allows users to design, test, and implement their Altera devices and get them to the market faster.

Riviera is a cross platform tool supporting UNIX, Linux and Windows. Riviera is a best-in-class verification tool, allowing Altera designers to get the most accurate results in the shortest time.

Table 1 lists Aldec’s design tools that support Altera devices.

Table 1. Design Tools Supporting Altera Devices        
Design Flow Tool Name Comments
Verification
Simulation Active-HDL

Active-HDL supports mixed VHDL, Verilog, SystemC, SystemVerilog and EDIF design entries. It also allows high performance simulation and debugging from one closely integrated environment.

Riviera

Riviera is a high-performance ASIC and high-density FPGA common kernel verification solution for 32-bit and 64-bit platforms. Support for mixed VHDL, Verilog, EDIF, SystemC, SystemVerilog and Assertions (SVA, OVA and PSL) are available in this unified debugging environment.

In-System Debug Active-HDL See Active-HDL description above.
Riviera See Riviera description above.

Contact Information

For additional information, contact Aldec at:

Aldec, Inc.
2260 Corporate Circle
Henderson, NV 89074 USA
Phone: 702-990-4400
Fax: 702-990-4414
Email: info@aldec.com
URL: http://www.aldec.com

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