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EDA Partners

 
Access Program The Altera® Commitment to Cooperative Engineering Solutions (ACCESS) program ensures that Altera customers have a solid design methodology to develop their FPGA and HardCopy® ASIC designs. Many communications, medical, and industrial equipment companies use Altera FPGAs to implement their designs.

Altera's ACCESS Program partners are listed alphabetically below or by design software.

ACCESS Program Partners

Table 1 alphabetically lists Altera's ACCESS Program partners.

Table 1. ACCESS Program Partners
ACCESS Partner System Level (1) Design Entry (2) Synthesis (3) Verification (4) Board Level (5)
Adveda Check - - Check -
Aldec, Inc. Check Check - Check -
Agilent Technologies - - - - Check
Agility Design Solutions Check - Check - -
Altium Check Check Check Check Check
Blue Pearl - Check Check Check -
Bluespec Check Check Check Check -
Cadence Design Systems, Inc. Check Check - Check Check
DAFCA - - - Check -
EMA Design Automation - Check - Check Check
FishTail - - Check - -
GateRocket - - - Check -
HDL Works - Check - Check -
Impulse Accelerated Technologies Check - - - -
Magma - - Check - -
Mentor Graphics® Check Check Check Check Check
Simucad Design Automation -

-

-

Check

-

SiSoft Check - - - -
Symphony EDA - Check - Check -
SynaptiCAD Check Check - Check -
Synopsys Check Check Check Check Check
Synplicity Check Check Check Check -
Taray, Inc

-

-

-

-

Check

Temento Systems - - - Check -
TransEDA - Check - Check -
Zuken - - - - Check

Notes:

  1. High-level design software supports:
    • Hardware/software partitioning and co-simulation
    • Device partitioning
    • High-level design software
  2. Design entry software supports:
    • Design entry
    • Rules check
  3. Synthesis software supports:
    • Register transfer level (RTL) synthesis
    • Physical synthesis
  4. Verification software supports:
    • Simulation
    • In-system debugging
    • Timing analysis
    • Formal verification
  5. Board-level software supports:
    • Board design entry
    • Board verification
    • Signal integrity analysis

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