SOPC Builder's System Interconnect Fabric
The system interconnect fabric, previously known as Avalon® switch fabric, is SOPC Builder’s specialized interconnect technology. SOPC Builder can automatically generate a new optimized system interconnect fabric each time you add a new component or modify a peripheral. The automatic generation of the system interconnect fabric allows you to quickly and easily modify your system to improve performance or add capabilities. The SOPC Builder tool is included with Quartus® II Web Edition and Subscription Edition development software.
The system interconnect fabric uses minimal FPGA logic resources to integrate your system components. The system interconnect fabric includes support for the following features:
Figure 1 shows an example of multiple masters and slaves connected to SOPC Builder's system interconnect fabric. Figure 2 shows a video imaging example demonstrating the system interconnect fabric's capability of integrating both data-streaming components and control memory-mapped components.
Figure 1. System Interconnect Fabric
Figure 2. System Interconnect Fabric with Avalon Memory-Mapped and Avalon-Streaming Interfaces
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System Interconnect Fabric Specification
Altera designed the system interconnect fabric specification to accommodate peripheral development in a system-on-a-programmable-chip (SOPC) environment. The specification gives you a basis for describing the ports of Avalon interfaces (for example, streaming datapath ports and address-based read/write ports found in Avalon streaming and memory-mapped interfaces). The specification describes transfers between the port and an interconnect fabric. Per the specification, any Avalon memory-mapped master can be dynamically connected to any Avalon slave.
Avalon interfaces are flexible and allow you to limit the number and types of signals to the requirements of the port and the types of data transfers. The system interconnect fabric defines the interconnect strategy that allows any Avalon memory-mapped or streaming master to interact with any Avalon memory-mapped or streaming slave. It supports a wide range of system architectures, including single-master and multiple-master systems, and allows seamless data transfers between peripherals with differing datapaths. The system interconnect fabric equally supports processors and peripherals external to the FPGA.
Avalon specification features include:
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