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Design Entry and Synthesis

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Quartus® II design software delivers the highest productivity and performance for Altera® FPGAs, CPLDs, and HardCopy® ASICs, and offers the following design features to accelerate the design process:

  • Design entry
  • Scripting support
  • Incremental compilation: initial setup
  • Qsys system integration tool
  • SOPC Builder
  • MegaWizardTM Plug-In Manager
  • I/O pin assignment analysis
  • Quartus II integrated synthesis
  • Rapid Recompile
  • Third-party design entry and synthesis
  • Basic compilation flow

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View and Generate License

View and Generate License
  • Accessing and managing your Quartus II Subscription Edition software and Altera intellectual property (IP) core licenses just got a lot easier and faster. You can now view, modify, generate, and manage your licenses 24/7 through our new online Self-Service Licensing Center.

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Design Entry

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  • Quartus II software supports various methods of design entry including VHDL, Verilog, schematic design, block editor, and third-party netlist
  • Tutorials are available to guide and help you get started in your design

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Scripting Support

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  • Allows you to run the Quartus II software synthesis, place-and-route process, timing analysis, and programming modules independently from the command line
  • Provides easy-to-use Tcl interface

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Incremental Compilation: Initial Setup

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  • Offers the most productive incremental design methodology for high-density FPGAs
  • Reduces design compilation times up to 70 percent
  • Supports both top-down and bottom-up team-based design and delivers faster compilation times for design iterations
  • Requires setup at the beginning of design process

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Qsys System Integration Tool

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  • Automatically generates interconnect logic and HDL to connect IP functions and subsystems
  • Delivers high performance system with a new FPGA-optimized network-on-a-chip (NoC) technology
  • Enables system scalability with design reuse flow feature

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SOPC Builder

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  • Allows you to rapidly and easily build and evaluate embedded systems
  • Integrates off-the-shelf IP from Altera or Altera Megafunction Partners Program (AMPPSM) partners
  • Enables you to create your own reusable custom components
  • Generates HDL to build an interconnect fabric optimized for the requirements of each system

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MegaWizard Plug-In Manager

I/O Pin Assignment Analysis

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  • Allows up-front I/O pin assignment and validation
  • Enables PCB layout to begin earlier in the design process
  • Allows you to change and validate pin assignments at any time
  • Makes it easy to allocate and manage pin assignments

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Quartus II Integrated Synthesis

Quartus II software includes a comprehensive integrated synthesis solution and advanced integration with leading third-party synthesis software vendors. Quartus II integrated synthesis includes advanced synthesis options and compiler directives, or attributes, to guide the synthesis process to achieve optimal results. The incremental synthesis feature in Quartus II software gives you more control over design changes and improves synthesis compilation times for incremental changes.

Rapid Recompile

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  • For a small engineering change order (ECO) after a full compile, Rapid Recompile maximizes your productivity by reducing your compilation time by 65 percent on average and improves design timing preservation. Small design changes that typically work well within a module include adding a register, changing I/O locations, or rewiring SignalTapTM II probes. Use Rapid Recompile for making small design changes when your timing requirements are met or simply to get faster compilation.

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Third-Party Design Entry and Synthesis

With Quartus II software, you can use a variety of third-party design entry and synthesis tools. Altera works closely with third-party companies that provide HDL synthesis, system-level co-design, and physical synthesis to ensure that you can take advantage of the latest synthesis tools and methodologies. A complete listing of third-party EDA vendors that support Altera devices is available on the EDA Partners page.

Basic Compilation Flow

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  • Processes the design files with synthesis, fitter, assembler, and timing analysis modules
  • Offers tutorials to guide and help you get started in your design
  • Provides changeable fitter effort and setting
  • Allows assignment setting for resources
  • Generates programming file for download to devices

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